DataFlowSanitizer: move abilist input file to Inputs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188423 91177308-0d34-0410-b5e6-96231b3b80d8
[llvm-build] Make Py3 compatible.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188424 91177308-0d34-0410-b5e6-96231b3b80d8
R600/SI: Assign a register class to the $vaddr operand for MIMG instructions

The previous code declared the operand as unknown:$vaddr, which made
it possible for scalar registers to be used instead of vector registers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188425 91177308-0d34-0410-b5e6-96231b3b80d8
R600/SI: Choose the correct MOV instruction for copying immediates

The instruction selector will now try to infer the destination register
so it can decided whether to use V_MOV_B32 or S_MOV_B32 when copying
immediates.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188426 91177308-0d34-0410-b5e6-96231b3b80d8
R600/SI: Lower BUILD_VECTOR to REG_SEQUENCE v2

Using REG_SEQUENCE for BUILD_VECTOR rather than a series of INSERT_SUBREG
instructions should make it easier for the register allocator to coalasce
unnecessary copies.

v2:
  - Use an SGPR register class if all the operands of BUILD_VECTOR are
    SGPRs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188427 91177308-0d34-0410-b5e6-96231b3b80d8
R600/SI: Use i8 types for resource descriptors in tests

We switched from i32 to i8 types a while ago and the tests were never
updated.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188428 91177308-0d34-0410-b5e6-96231b3b80d8