mips: use putDReg/getDReg for ceil.l.d

For better clarity and consistency, use putDReg/getDReg instead of
putFReg/getFReg for ceil.l.d.
Non-functional change.


git-svn-id: svn://svn.valgrind.org/vex/trunk@2971 8f6e269a-dfd6-0310-a8e1-e2731360e62c
mips: add a missing break

Add a missing break found by IBM's BEAM checker and reported by Florian.


git-svn-id: svn://svn.valgrind.org/vex/trunk@2972 8f6e269a-dfd6-0310-a8e1-e2731360e62c
This patch makes the needed changes to the lxvw4x for Little Endian.
The data was being loaded in the Big Endian data order for most
cases.  The code in host_ppc_isel.c was changed to do a right
shift and to permute the hi and lo registers in the other order
to ensure the data was always loaded in BE order.  The lxvw4x
emulation in guest_ppc_toIR.c was changed to permute the data from
the BE order to LE order when running on an LE system.

bugzilla 339433

git-svn-id: svn://svn.valgrind.org/vex/trunk@2973 8f6e269a-dfd6-0310-a8e1-e2731360e62c