usb: host: xhci-plat: sort the headers in alphabetic order

Sorting the headers in alphabetic order will help to reduce the conflict
when adding new headers later.

Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Acked-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit 48157bb97f074d21372bd3ae87e5988ed23c8972)
Signed-off-by: Mark Brown <broonie@kernel.org>
xhci: Platform: Set xhci lpm support quirk based on platform data

If an xhci platform supports USB3 LPM capability then enable
XHCI_LPM_SUPPORT quirk flag.

Signed-off-by: Pratyush Anand <pratyush.anand@st.com>
Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit 20f6fdd01c2c0de9cc1109083222edded24c5350)
Signed-off-by: Mark Brown <broonie@kernel.org>

Conflicts:
	Documentation/devicetree/bindings/usb/usb-xhci.txt
usb: dwc3: core: support optional PHYs

Since PHYs for dwc3 is optional (not all SoCs having PHYs for DWC3
should be programmed), do not return from probe if the USB PHY library
returns -ENODEV as that indicates the platform does not have a
programmable PHY.

While this can be considered as a temporary fix, a long term solution
would be to add 'nop' PHY for platforms that does not have programmable
PHY.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
(cherry picked from commit 122f06e60f90a43d9b2fb30662af688dfb759379)
Signed-off-by: Mark Brown <broonie@kernel.org>
usb: dwc3: adapt dwc3 core to use Generic PHY Framework

Adapted dwc3 core to use the Generic PHY Framework. So for init, exit,
power_on and power_off the following APIs are used phy_init(), phy_exit(),
phy_power_on() and phy_power_off().

However using the old USB phy library wont be removed till the PHYs of all
other SoC's using dwc3 core is adapted to the Generic PHY Framework.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
(cherry picked from commit 57303488cd37da58263e842de134dc65f7c626d5)
Signed-off-by: Mark Brown <broonie@kernel.org>

Conflicts:
	drivers/usb/dwc3/core.c
usb: dwc3: gadget: clear stall when disabling endpoint

so it seems like DWC3 IP doesn't clear stalls
automatically when we disable an endpoint, because
of that, we _must_ make sure stalls are cleared
before clearing the proper bit in DALEPENA register.

Cc: <stable@vger.kernel.org> # v3.4+
Reported-by: Johannes Stezenbach <js@sig21.net>
Signed-off-by: Felipe Balbi <balbi@ti.com>
(cherry picked from commit 687ef9817df7ed960d14575b9033dde3d04631fe)
Signed-off-by: Mark Brown <broonie@kernel.org>
dwc3: host: Enable USB3 LPM capability

All dwc3 based xhci host controller supports USB3.0 LPM functionality.
Therefore enable it in platform data for all dwc3 based xhci device if
DWC3_HOST_USB3_LPM_ENABLE is selected in Kconfig.

Signed-off-by: Pratyush Anand <pratyush.anand@st.com>
Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
Signed-of-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit b2f463e1300016785d63475c56f5807e2be00934)
Signed-off-by: Mark Brown <broonie@kernel.org>
usb: dwc3: core: define bit 10 of GCTL register

This bit is necessary for implemeting workaround
for known issue with some revisions of this core.

Signed-off-by: Felipe Balbi <balbi@ti.com>
(cherry picked from commit fc483fd2a19d7ff97e677cc8e8f8d3990bbf381c)
Signed-off-by: Mark Brown <broonie@kernel.org>
usb: dwc3: workaround: clock gating issues

Revisions between 2.10a and 2.50a (included) have
a known issue which may cause xHCI compliance tests
to fail and/or quality issues with Isochronous
transactions.

Note that this issue only impacts certain configurations
of those revisions, namely the ones which have clock
gating enabled.

The suggested workaround is to disable clock gating in
known broken revisions, make sure HW LPM is disabled
and set GCTL.SOFITPSYNC to 1.

Signed-off-by: Felipe Balbi <balbi@ti.com>
(cherry picked from commit 39fe817a9ed40af22f7289e1562329cfe9d9b20b)
Signed-off-by: Mark Brown <broonie@kernel.org>
usb: dwc3: workaround: bogus hibernation events

Revision 2.20a of the core has a known issue
which would generate bogus hibernation events
_and_ random failures on USB CV TD.9.23 test
case.

The suggested workaround is to ignore hibernation
events which don't match currently connected
speed.

Signed-off-by: Felipe Balbi <balbi@ti.com>
(cherry picked from commit d396f34012ca907c28e502e68c15c230187846bf)
Signed-off-by: Mark Brown <broonie@kernel.org>
usb: dwc3: cleanup struct dwc3

move 1-bit flags to the bottom of the structure,
sort all bit flags alphabetically, add documentation
which was missing.

Signed-off-by: Felipe Balbi <balbi@ti.com>
(cherry picked from commit 01a2290a1629a53061f9db88d52cf1623de7e908)
Signed-off-by: Mark Brown <broonie@kernel.org>
usb: dwc3: add has_hibernation flag

this will tell driver that this version
of the core was configured with hibernation
feature enabled.

Signed-off-by: Felipe Balbi <balbi@ti.com>
(cherry picked from commit b559531d3b7a3ab1d93c873ccbd4c245c0372558)
Signed-off-by: Mark Brown <broonie@kernel.org>
usb: dwc3: core: allocate scratch buffers

We must read HWPARAMS4 register to figure out
how many scratch buffers we should allocate.

Later patch will use "Set Scratchpad Buffer
Array" command to pass the pointer to the
IP so it can be used during hibernation.

Signed-off-by: Felipe Balbi <balbi@ti.com>
(cherry picked from commit adac070445873c119bb40fdf8bdb7fef701a953e)
Signed-off-by: Mark Brown <broonie@kernel.org>
usb: dwc3: core: Fix gadget for system suspend/resume

During system resume, if the event buffers are not setup before
the gadget controller starts then we start with invalid context
and this can lead to bus access errors. This is especially true for
platforms that loose the controller context during system suspend.
e.g. AM437x.

The following backtrace was found when the system is suspended
and resumed with g_zero loaded on AM437x-evm (USB cable connected
to host all the while).

[  120.981506] WARNING: CPU: 0 PID: 1656 at drivers/bus/omap_l3_noc.c:137 l3_interrupt_handler+0x198/0x28c()
[  120.981514] L3 custom error: MASTER:USB0 WR TARGET:GPMC
[  120.981638] Modules linked in: g_mass_storage usb_f_mass_storage libcomposite configfs bufferclass_ti(O) omaplfb(O) cryptodev(O) dwc3 snd_soc_evm snd_soc_omap snd_pe
[  120.981659] CPU: 0 PID: 1656 Comm: sh Tainted: G           O 3.12.10-gc559824 #1
[  120.981669] Backtrace:
[  120.981705] [<c0017880>] (dump_backtrace+0x0/0x10c) from [<c0017a1c>] (show_stack+0x18/0x1c)
[  120.981730]  r6:c02819ac r5:00000009 r4:ec137cb8 r3:00000000
[  120.981767] [<c0017a04>] (show_stack+0x0/0x1c) from [<c056c0b0>] (dump_stack+0x20/0x28)
[  120.981802] [<c056c090>] (dump_stack+0x0/0x28) from [<c0046d08>] (warn_slowpath_common+0x70/0x90)
[  120.981830] [<c0046c98>] (warn_slowpath_common+0x0/0x90) from [<c0046dcc>] (warn_slowpath_fmt+0x38/0x40)
[  120.981856]  r8:c0855eb0 r7:00000002 r6:f1000700 r5:00000007 r4:80080003
[  120.981886] [<c0046d94>] (warn_slowpath_fmt+0x0/0x40) from [<c02819ac>] (l3_interrupt_handler+0x198/0x28c)
[  120.981900]  r3:c0801ab8 r2:c06cb354
[  120.981936] [<c0281814>] (l3_interrupt_handler+0x0/0x28c) from [<c007162c>] (handle_irq_event_percpu+0x54/0x1b8)
[  120.981962] [<c00715d8>] (handle_irq_event_percpu+0x0/0x1b8) from [<c00717c0>] (handle_irq_event+0x30/0x40)
[  120.981993] [<c0071790>] (handle_irq_event+0x0/0x40) from [<c0074058>] (handle_fasteoi_irq+0x74/0x128)
[  120.982006]  r4:ed0056c0 r3:00000000
[  120.982033] [<c0073fe4>] (handle_fasteoi_irq+0x0/0x128) from [<c0070f34>] (generic_handle_irq+0x28/0x38)
[  120.982046]  r4:0000002a r3:c0073fe4
[  120.982085] [<c0070f0c>] (generic_handle_irq+0x0/0x38) from [<c0015560>] (handle_IRQ+0x38/0x8c)
[  120.982098]  r4:c080137c r3:00000182
[  120.982124] [<c0015528>] (handle_IRQ+0x0/0x8c) from [<c00087e0>] (gic_handle_irq+0x30/0x5c)
[  120.982145]  r6:ec137dd0 r5:c07ac480 r4:fa24010c r3:00000100
[  120.982169] [<c00087b0>] (gic_handle_irq+0x0/0x5c) from [<c056fcc0>] (__irq_svc+0x40/0x54)
[  120.982179] Exception stack(0xec137dd0 to 0xec137e18)
[  120.982195] 7dc0:                                     00000000 a00001d3 00000000 00000004
[  120.982216] 7de0: a0000153 ec1d9010 c080de90 ec137e30 c080debc 00000000 ed756e44 ec137e2c
[  120.982232] 7e00: ec137de0 ec137e18 bf1150e4 bf115474 60000153 ffffffff
[  120.982253]  r7:ec137e04 r6:ffffffff r5:60000153 r4:bf115474
[  120.982327] [<bf115438>] (dwc3_complete+0x0/0x40 [dwc3]) from [<c0338f50>] (dpm_complete+0xd4/0x19c)
[  120.982341]  r5:ed756e10 r4:ed756e64
[  120.982370] [<c0338e7c>] (dpm_complete+0x0/0x19c) from [<c0339034>] (dpm_resume_end+0x1c/0x20)
[  120.982400] [<c0339018>] (dpm_resume_end+0x0/0x20) from [<c006d4ec>] (suspend_devices_and_enter+0x118/0x33c)
[  120.982412]  r4:c0833da4 r3:00000000
[  120.982436] [<c006d3d4>] (suspend_devices_and_enter+0x0/0x33c) from [<c006d928>] (pm_suspend+0x218/0x254)
[  120.982458] [<c006d710>] (pm_suspend+0x0/0x254) from [<c006c594>] (state_store+0x70/0xc0)
[  120.982478]  r6:c057a6cc r5:c06a8320 r4:00000003 r3:0000006d
[  120.982515] [<c006c524>] (state_store+0x0/0xc0) from [<c0264cc0>] (kobj_attr_store+0x1c/0x28)
[  120.982546] [<c0264ca4>] (kobj_attr_store+0x0/0x28) from [<c012ccb8>] (sysfs_write_file+0x170/0x1a4)
[  120.982583] [<c012cb48>] (sysfs_write_file+0x0/0x1a4) from [<c00d17e4>] (vfs_write+0xb8/0x190)
[  120.982611] [<c00d172c>] (vfs_write+0x0/0x190) from [<c00d1bf8>] (SyS_write+0x44/0x78)
[  120.982641] [<c00d1bb4>] (SyS_write+0x0/0x78) from [<c0014660>] (ret_fast_syscall+0x0/0x30)

Signed-off-by: Roger Quadros <rogerq@ti.com>
Acked-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
(cherry picked from commit ee47ac3f55bc45a0c7fa67e6cc3c63cef1353f88)
Signed-off-by: Mark Brown <broonie@kernel.org>
mmc: omap_hsmmc: add tuning support

MMC tuning procedure is required to support SD card
UHS1-SDR104 mode and EMMC HS200 mode.

The tuning function omap_execute_tuning() will only
be called by the MMC/SD core if the corresponding
speed modes are supported by the OMAP silicon which
is set in the mmc host "caps" field.

Signed-off-by: Viswanath Puttagunta <vishp@ti.com>
Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
[ kishon@ti.com : Set the functional clock to 192MHz if the contoller
                  supports HS200 ]
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
mmc: omap_hsmmc: add voltage switch support for UHS SD card

UHS sd card i/o data line can operate at 3V and 1.8V on UHS speed
modes. Add support for signal voltage switch and check for card_busy.

Signed-off-by: Balaji T K <balajitk@ti.com>
Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
ARM: dts: add pbias-supply

Add pbias-supply to mmc1/sd card.

Signed-off-by: Balaji T K <balajitk@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
ARM: dts: dra72-evm: Set MMC host controller capability properties

Added properties in device tree to indicate the MMC controllers support
UHS or HS200.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
ARM: dts: dra72-evm: Set max clock frequency of MMC1 and MMC2 to 192MHz

MMC1 supports SDR104 and MMC2 supports HS200 both of which requires
192MHz clock. Set the maximum operating clock frequency to 192 MHz.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
ARM: dts: dra7-evm: add evm_3v3_sd regulator

Add a node for evm_3v3_sd using onboard pcf GPIO expander which feeds
on to mmc power-on.

Update mapping for vmmc-supply and vmmc_aux-supply.
evm_3v3_sd supplies to SD card vdd, and ldo1 to sdcard i/o voltage.

Signed-off-by: Balaji T K <balajitk@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
ARM: dts: dra72-evm: add evm_3v3_sd regulator

Add a node for evm_3v3_sd using pcf which feeds on to mmc power-on.

Update mapping for vmmc-supply and vmmc_aux-supply.
evm_3v3_sd supplies to SD card vdd, and ldo1 to sdcard i/o voltage.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>