[adc5g] Possible fix for rare SPI read errors that may also cause calibration issues.

It turns out the SPI read code is probably shifting the MISO data in a little too late
which may cause, in some situations, erroneous data to be shifted in. This appears to
be bitcode dependant and may be related to the propagation delay of the MISO line
in different implementations. This also appears to be more prevalent with the ZDOK 1
interface.

Additionally, this can have the effect of causing either failed MMCM calibrations or
"all zero" output from the ADC if the user uses the adc5g.set_test_mode Python function.
That function first reads in the current configuration, sets the test bit to one, and then
writes the changed configuration back. If it happens to read erroneous data over the SPI
at that moment then it might fail to write the test bit or it might configure the ADC
into an unexpected mode, in some cases the standby mode.

This commit changes the behavior of the SPI code to shift the MISO bits in three OPB
clocks before the rising edge of the SPI interface's SCLK signal; this was originally
set to just one clock before the rising edge.

Although this should make read errors over SPI non-existent a feature has also been
added that allows the user to set at what phase of SCLK the MISO data gets shifted into
the OPB register. This is programmable for each ZDOK and can be controlled with word
offset 8 of adc5g_controller.