Implement initial version of cpuinfo.
Define new inline TLB and cache functions.
First step in cleanup of locore.S. Fix initial stack allocation. Rename initial page table and use it for startup of secondary cores too. Same page table can be used for CPU hot plug and/or power management later.
Add new ARMv6 specific trap-v6.c.
Add new pmap code.
Switch DMA coherent memory to normal uncacheable memory
As per Alan L. Cox recommendation, remove lazy switch.
Remove now useless .arch directive form assembler files.
Make ofwbus as a subclass of simplebus. Remove bogus checking for busy resource.
Remove now duplicated code from ofwbus.c. Move all useful methods into simplebus.c.
Move resource managers for IRQ and memory from ofwbus to nexus.
Other code uses 0 for invalid phandle, so use it in simplebus_get_devinfo() too.
Rename Exynos UART. No functional change.
Don't use C++ reserved word "class" in uart_cpu_fdt.c. No functional change.
Use linker set for UARTs definition
Move UATRs FDT declarations into appropriate files. Make uart_class structure static where is possible.