ARM: OMAP2+: AM33XX: Add assembly code for PM operations

In preparation for suspend-resume support for AM33XX, add
the assembly file with the code which is copied to internal
memory (OCMC RAM) during bootup and runs from there.

As part of the low power entry (DeepSleep0 mode in AM33XX TRM),
the code running from OCMC RAM does the following
1. Stores the EMIF configuration
2. Puts external memory in self-refresh
3. Disables EMIF clock
4. Executes WFI after writing to MPU_CLKCTRL register.

If no interrupts have come, WFI execution on MPU gets registered
as an interrupt with the WKUP-M3. WKUP-M3 takes care of disabling
some clocks which MPU should not (L3, L4, OCMC RAM etc) and takes
care of clockdomain and powerdomain transitions as part of the
DeepSleep0 mode entry.

In case a late interrupt comes in, WFI ends up as a NOP and MPU
continues execution from internal memory. The 'abort path' code
undoes whatever was done as part of the low power entry and indicates
a suspend failure by passing a non-zero value to the cpu_resume routine.

The 'resume path' code is similar to the 'abort path' with the key
difference of MMU being enabled in the 'abort path' but being
disabled in the 'resume path' due to MPU getting powered off.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
ARM: OMAP2+: AM33XX: Basic suspend resume support

AM335x supports various low power modes as documented
in section 8.1.4.3 of the AM335x Technical Reference Manual.

DeepSleep0 mode offers the lowest power mode with limited
wakeup sources without a system reboot and is mapped as
the suspend state in the kernel. In this state, MPU and
PER domains are turned off with the internal RAM held in
retention to facilitate the resume process. As part of
the boot process, the assembly code is copied over to OCMCRAM
using the OMAP SRAM code so it can be executed to turn of the
EMIF.

AM335x has a Cortex-M3 (WKUP_M3) which assists the MPU
in DeepSleep0 and Standby entry and exit. WKUP_M3 takes care
of the clockdomain and powerdomain transitions based on the
intended low power state. MPU needs to load the appropriate
WKUP_M3 binary onto the WKUP_M3 memory space before it can
leverage any of the PM features like DeepSleep.

The WKUP_M3 is managed by a remoteproc driver. The PM code hooks
into the remoteproc driver through an rproc_ready callback to
allow PM features to become available once the firmware for the
wkup_m3 has been loaded. This code maintains its own state machine
for the wkup_m3 so that it can be used in the manner intended for
low power modes.

In the current implementation when the suspend process
is initiated, MPU interrupts the WKUP_M3 to let it know about
the intent of entering DeepSleep0 and waits for an ACK. When
the ACK is received MPU continues with its suspend process
to suspend all the drivers and then jumps to assembly in
OCMC RAM. The assembly code puts the external RAM in self-refresh
mode, gates the MPU clock, and then finally executes the WFI
instruction. Execution of the WFI instruction with MPU clock gated
triggers another interrupt to the WKUP_M3 which then continues
with the power down sequence wherein the clockdomain and
powerdomain transition takes place. As part of the sleep sequence,
WKUP_M3 unmasks the interrupt lines for the wakeup sources. WFI
execution on WKUP_M3 causes the hardware to disable the main
oscillator of the SoC and from here system remains in sleep state
until a wake source brings the system into resume path.

When a wakeup event occurs, WKUP_M3 starts the power-up
sequence by switching on the power domains and finally
enabling the clock to MPU. Since the MPU gets powered down
as part of the sleep sequence in the resume path ROM code
starts executing. The ROM code detects a wakeup from sleep
and then jumps to the resume location in OCMC which was
populated in one of the IPC registers as part of the suspend
sequence.

Code is based on work by Vaibhav Bedia.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
ARM: OMAP2+: AM33XX: Hookup AM33XX PM code into OMAP builds

With all the requisite changes in place we can now enable the basic
PM support for AM33xx. This patch updates the various OMAP files
to enable suspend-resume on AM33xx.

Because the suspend resume functionality is different on AM33xx
than other OMAP platforms due to the need for M3 firmware and an
IPC channel to be in place, separate PM ops are used instead of
omap_pm_ops. These are now set using omap2_common_suspend_init
so the AM33xx can make a decision at runtime to enable suspend based
on the availabilty of aforementioned requirements.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
ARM: OMAP2+: AM33XX: PM: Add standby support

Standby is one of the Power Modes supported on AM335x.
In Standby Mode, Everything is preserved including SDRAM. Only required
module clocks are enabled, PLLs are put in bypass and MPU is power
gated.
This Mode has higher power consumption than DeepSleep0 but better wake
latency.

Add support for standby mode
- MPU Power domain is OFF
- PER Power domain is ON
- Master Oscillator is ON

To enter standby mode, echo "standby" to PM State sysfs entry
        "echo standby > /sys/power/state"

Currently UART, GPIO & RTC wakeup events are tested on am335x-evm.

Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
ARM: OMAP2+: AM43XX: Add reserve function for AM43XX

AM33XX and AM43XX both share the same map_io function in
board_generic.c, but this function calls am33xx_dram_sync_init
which depends on a call to am33xx_reserve which is not set for
AM43XX. Add this to DT_MACHINE_INIT for AM43XX as it will
be needed later for suspend/resume but is needed now for boot.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
ARM: OMAP2+: Wakeupgen: Add support for context save on AM43XX

AM43XX lacks the SAR area which has been used in OMAP4/5 for
saving and restoring the context around low power states.
In case of AM43XX the context is saved and restored by
the kernel. Introduce wakeupgen_ops so that context save
and restore can be set on a per-SoC basis during init.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
ARM: OMAP2+: extend wkup_m3 pdata-quirks to am43xx

Let am43xx use the pdata-quirks defined for the wkup_m3 to reset the
device during boot.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
ARM: dts: am4372: Add wkup_m3 node

Add proper interrupt data and register data so wkup_m3 can be
properly initialized for AM43xx by remoteproc.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
remoteproc: wkup_m3: Add support for am4372 to wkup_m3_rproc

Add ti,am4372-wkup-m3 compat flags to driver and expand Kconfig for
am43xx support.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
ARM: OMAP2+: Introduce low-level suspend code for AM43XX

Although similar to AM33XX, introduce a new low-level asm file for
suspend containing new context save and restore paths for EMIF and l2
cache disabling and enabling.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
ARM: OMAP2+: AM43XX: add AM43xx support to AM33xx PM Code

Because am33xx and am43xx families are very similar we can reuse much
of the code needed for suspend resume. Add code for SCU control and
additional arguments to be passed to low-level asm code.

Also introduce am33xx_pm_ops to allow for operations specific to
each SoC to be executed at init, pre-suspend, and post-suspend that
can be set at init time.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
ARM: OMAP2+: Hookup AM437x PM

Required changes have been made to am33xx PM code so enable
use for am43xx.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
ARM: OMAP2+: Add support for toggling VTT regulator

Some boards (currently AM335x EVM-SK & AM437x GP EVM) provides s/w
control via GPIO to toggle VTT regulator to reduce power consumption in
low power state.

The VTT regulator should be disabled after enabling self-refresh on
suspend, and should be enabled before disabling self-refresh on resume.
This is to allow proper self-refresh entry/exit commands to be
transmitted to the memory.

Add support for toggling VTT regulator using DT properties.
Actual toggling happens in CM3 Firmware. The enable option & the GPIO
pin used is collected in A8 Core and then sent to CM3 using IPC
registers.

Note:
Here it is assumed that VTT Toggle will be done using a pin on GPIO-0
Instance. The reason is GPIO-0 is in wakeup domain.

While here, fix the VTT GPIO pin mask. VTT GPIO PIN parameter is 6 bits
and so the mask should be 0x3f & not 0x2f.

Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
ARM: dts: AM33xx EVM-SK: add support for VTT Toggle

AM33xx EVM-SK EVM provides s/w control via GPIO over the VTT regulator
to reduce power consumption in low power state.

Now that AM33xx PM Code provides an option to toggle VTT, add the
relevant DT property.

On AM33xx EVM-SK EVM, VTT enable pin is connected to GPIO0 Pin 7.

Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
ARM: OMAP2+: AM43xx: Add support for IO Isolation

AM43xx support isolation of the many of the IOs so that control is taken
from the peripheral they are connected to and overridden by values
present in the CTRL_CONF_* registers for the pad in the control module.

The actual toggling happens from the wkup_m3, so use a DT property from the
wkup_m3 node to allow the PM code to communicate the necessity for
placing the IOs into isolation.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
ARM: dts: am437x-gp-evm: Add state for ddr3 vtt toggle pin

Add pinctrl data for ddr_vtt_toggle pin so that it is configured
for proper state during DeepSleep0. The pin should enter DS0 off mode
and hold the line low so VTT regulator is kept off while suspended.
It is also important for the PULLUP to be set on this pin so that
on removal of isolation, the VTT line is pulled high as a requirement
for bringing the DDR3 out of self-refresh.

This toggling is dependent on the IO isolation controlled by the
wkup_m3. Without placing the IOs into isolation the DS0 states set for
the pin will not be latched into effect during suspend.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
ARM: dts: am437x-gp-evm: Enable wkup_m3 control of IO isolation

With this flag wkup_m3 is able to control IO isolation during
suspend on the board.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
phy: phy-omap-pipe3: Add support for PCIe PHY

PCIe PHY uses an external pll instead of the internal pll used by SATA
and USB3. So added support in pipe3 PHY to use external pll.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
phy: pipe3: insert delay to enumerate in GEN2 mode

8-bit delay value (0xF1) is required for GEN2 devices to be enumerated
consistently. Added an API to be called from PHY drivers to set this delay
value and called it from PIPE3 driver to set the delay value.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Merge branch 'connectivity-ti-linux-3.14.y' of git://git.ti.com/connectivity-integration-tree/connectivity-ti-linux-kernel into ti-linux-3.14.y

TI-Feature: connectivity
TI-Tree: git://git.ti.com/connectivity-integration-tree/connectivity-ti-linux-kernel.git
TI-Branch: connectivity-ti-linux-3.14.y

* 'connectivity-ti-linux-3.14.y' of git://git.ti.com/connectivity-integration-tree/connectivity-ti-linux-kernel:
  phy: pipe3: insert delay to enumerate in GEN2 mode
  phy: phy-omap-pipe3: Add support for PCIe PHY
  ARM: dts: dra72-evm: Support tps power button
  ARM: dts: omap5-uevm: Add Palmas RTC and power button support
  Input: misc: introduce palmas-pwrbutton
  doc: dt/bindings: input: introduce palmas power button description

Signed-off-by: Dan Murphy <DMurphy@ti.com>