msm: remove obsolete DMM code and config options

DMM is no longer supported, but there were still fragments
of the DMM support dependent on the obsolete config options
CONFIG_ENABLE_DMM and CONFIG_FIX_MOVABLE_ZONE present.
Remove these config options and the associated code.

Change-Id: I01c715c8d9c65eebc7ff123a8a0878166b606e0c
CRs-fixed: 460735
Signed-off-by: Larry Bassel <lbassel@codeaurora.org>

Conflicts:
	arch/arm/mach-msm/board-8064.c
	arch/arm/mach-msm/board-8930.c
	arch/arm/mach-msm/board-8960.c
	arch/arm/mach-msm/memory_topology.c
msm: Remove alloc bootmem aligned

This function has no more callers and should never be used again.
Remove it.

Change-Id: I3006c03ba2294c7dfb49539dff92b21b6670b4be
Signed-off-by: Laura Abbott <lauraa@codeaurora.org>
msm: Completely remove memory from the memblock allocator

memblock_remove may not be sufficient to prevent placing
regions on top of each other. Call memblock_reserve and
memblock_free as well to completely remove the memory
from the allocator.

Change-Id: Iec481d7ce7a51c243e43a2d9be2fbfbf7b2717ed
Signed-off-by: Laura Abbott <lauraa@codeaurora.org>
msm: simplify placing memory pools

The algorithm for placing memory pools was manually inspecting
the memblock data structures and then doing a memblock_remove()
on the region it decided that the memory pool should be located at.

If other code already did a memblock_remove() it was possible
that the memblock data structures which this algorithm
was inspecting would not be correct and the memory pool might
be placed overlapping this previous allocation.

Instead use arm_memblock_steal() which will not have this
problem (and also lets the memblock subsystem do
the allocation without any manual inspection of memblocks).

Change-Id: I7db5cba0a8d5f222f9f2f131b4b42eb81171c45b
Signed-off-by: Larry Bassel <lbassel@codeaurora.org>
Perf: Add legacy support for userspace tools

We used the "rs" and "rm" modifiers to access
the L2CC and busmon PMU's before v3.4.

This patch modifies the CFG to keep the backward
compat alive till all tools progress to the
new named PMU interfaces.

Change-Id: I3a36ff8fb588382d445728a69ba790189e73ec40
Signed-off-by: Ashwin Chaugule <ashwinc@codeaurora.org>
Perf: Add PMU names to perf output

Output of raw events in perf tools can be hard to distinguish
when multiple PMU's have the same event encoding.

Show the PMU name along with the counter output.

e.g.

 Performance counter stats for 'ls':

          4514688 msm-l2 0x1

Change-Id: I65d4ac03c2fd562519ab78524b37467e7d53dbb3
Signed-off-by: Ashwin Chaugule <ashwinc@codeaurora.org>

Conflicts:
	arch/arm/mach-msm/perf_event_msm_l2.c
msm: perf: Relax Column exclusion checks for L2CC events

Identical L2CC events with the same register, code and group
can be set up with individual origin filters. The hardware
restricts counting only for identical register and group settings
but a different value for the event code.

Detect such identical events and let them pass the constraint
checks.

Change-Id: I609defb5c5b070b1007b2e7db9e2d8315d2ba1d7
Signed-off-by: Ashwin Chaugule <ashwinc@codeaurora.org>

Conflicts:
	arch/arm/mach-msm/perf_event_msm_l2.c
Perf: Add DT support for L1 and L2 PMU

Add device tree bindings for L1 and L2 performance
monitoring units.

CRs-Fixed: 430010
Change-Id: Ia10e21a445e9daa6b2e4a3f1dba4881e3e7b2ccb
Signed-off-by: Ashwin Chaugule <ashwinc@codeaurora.org>

Conflicts:
	arch/arm/boot/dts/msm8974.dtsi
	arch/arm/boot/dts/msm9625.dtsi
	arch/arm/mach-msm/Makefile
	arch/arm/mach-msm/perf_event_msm_krait_l2.c
	arch/arm/mach-msm/perf_event_msm_l2.c