ARM: versatile: pass correct machine type for Versatile AB

When U-Boot is configured for Versatile AB, it will still pass
the machine ID of Versatile PB to the kernel. After this simple
fix the system boots correctly.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
ARM: versatile: pass console setting to the kernel

The Versatiles come up with the primary UART set to ttyAMA0 at
38400 baud, and unless we pass this to the kernel it will assume
it is set to 9600 baud which will be quite awkward for the
terminal, let's try to be helpful and inform the kernel what
setting is used.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
net: gem: Check if phy was correctly detected

As tsec and fm drivers checking phydev->link
ensure that u-boot don't try access device if link is not ready.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
ARM: OMAP4/5: Remove dead code against CONFIG_SYS_CLOCKS_ENABLE_ALL

The commit
 f3f98bb0 : "ARM: OMAP4/5: Do not configure non essential pads, clocks, dplls"
removed the config option aimed towards moving that stuff into kernel, which
renders some code unreachable. Remove that code.

Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
ARM: OMAP4/5: Remove dead code against CONFIG_SYS_ENABLE_PADS_ALL

The commit
f3f98bb0 : "ARM: OMAP4/5: Do not configure non essential pads, clocks, dplls"
removed the config option aimed towards moving that stuff into kernel, which
renders some code unreachable. Remove that code.

Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
feature-removal-schedule.txt: Drop  CONFIG_SYS_ENABLE_PADS_ALL/CLOCKS_ENABLE_ALL

Signed-off-by: Tom Rini <trini@ti.com>
ARM: OMAP4: Rename to ti_omap4_common.h

Follow the pattern ti_<processor family>_common.h used by other TI processors
to be coherent. So just rename omap4_common.h to ti_omap4_common.h.

Signed-off-by: Enric Balletbo i Serra <eballetbo@gmail.com>
Reviewed-by:  Lokesh Vutla <lokeshvutla@ti.com>
ARM: OMAP5: Rename to ti_omap5_common.h

Follow the pattern ti_<processor family>_common.h used by other TI processors
to be coherent. So just rename omap5_common.h to ti_omap5_common.h.

Signed-off-by: Enric Balletbo i Serra <eballetbo@gmail.com>
Reviewed-by:  Lokesh Vutla <lokeshvutla@ti.com>
TI: armv7: Move ELM support to SoC configuration file.

The ELM hardware engine wihich is used for ECC error detections is not present
on OMAP3 SoC, so move the CONFIG_SPL_NAND_AM33XX_BCH from ti_armv7_common.h to
SoC configuration file.

Signed-off-by: Enric Balletbo i Serra <eballetbo@gmail.com>
Reviewed-by:  Lokesh Vutla <lokeshvutla@ti.com>
TI: armv7: Do not define the number DRAM banks if is already defined.

If CONFIG_NR_DRAM_BANKS is not defined, we say (for simplicity) that we have
1 bank, but for some boards should be interesting that we can define
CONFIG_NR_DRAM_BANKS. To handle this possibility just define the number of
DRAM banks if is not already defined. This is useful for some OMAP3 boards
where the DRAM initialitzation is only at u-boot level.

Signed-off-by: Enric Balletbo i Serra <eballetbo@gmail.com>
ARM: OMAP3: Rename OMAP3_PUBLIC_SRAM_* to NON_SECURE_SRAM_*

Other TI processors like am33xx, omap4 and omap5 have called these variables
as NON_SECURE_SRAM_*, shouldn't be a big problem rename these variables to
be coherent.

One reason more to rename these variables is to have the possibility of any
OMAP3 board to use the ti_armv7_common.h include as the NON_SECURE_SRAM_END
is used to define the CONFIG_SYS_INIT_SP_ADDR variable.

Signed-off-by: Enric Balletbo i Serra <eballetbo@gmail.com>
TI: OMAP3: Create common config files for TI OMAP3 platforms.

Create a new file, include/configs/ti_omap3_common.h, for everything
common to the OMAP3 SoC leaving just the board specific part to board
configuration file.

Signed-off-by: Enric Balletbo i Serra <eballetbo@gmail.com>
OMAP3: igep00x0: Convert to ti_omap3_common.h.

To reduce code duplication update omap3_igep00x0.h to use ti_omap3_common.h.

Signed-off-by: Enric Balletbo i Serra <eballetbo@gmail.com>
ARM: AM43xx: Enable DDR dynamic IO power down for DDR3

This patch enables dynamically powering down the
IO receiver when not performing a read on DDR3 board.
This optimizes both active and standby power consumption.
This is derived from a patch that is done on AM335x[1]

[1] http://arago-project.org/git/projects/?p=u-boot-am33x.git;a=commit;h=6a9ee4bc72ece53fabf01825605fba3d71d5feb2

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
ARM: AM335x: Enable DDR dynamic IO power down

This patch enables dynamically powering down the
IO receiver when not performing a read on boards using DDR3.
This optimizes both active and standby power consumption.
This bit is not set on EVM SK and EVM 1.5 and later boards.
Setting the same.

This has been tested on PG2.0 EVM1.5, EVM1.2, EVM-SK, BBB.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Satyanarayana, Sandhya <sandhya.satyanarayana@ti.com>
DRA7: Add support for ES1.1 silicon ID code

ES1.1 silicon is a very minor variant of ES1.0. Add priliminary support
for ES1.1 IDCODE change.

Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Tom Rini <trini@ti.com>
DRA7: add ABB setup for MPU voltage domain

Patch adds modification to shared omap5 abb_setup() function, and
proper registers definitions needed for ABB setup sequence. ABB is
initialized for MPU voltage domain at OPP_NOM.

Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Tom Rini <trini@ti.com>
am43xx_evm.h: Correct SPL max size

Upon further inspection of relevant parts of the architecture, the
maximum SPL binary size is 220KiB.

Cc: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
Merge branch 'u-boot-arm/next' into 'u-boot-arm/master'
Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'