2014-11-24  Michael Meissner  <meissner@linux.vnet.ibm.com>

	PR target/63965
	* config/rs6000/rs6000-cpus.def: Undo November 21st changes, a
	work in progress patch was committed instead of the fixes for
	63965.
	* config/rs6000/rs6000.c: Likewise.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@218027 138bc75d-0d04-0410-961f-82ee72b054a4
2014-11-24  Michael Meissner  <meissner@linux.vnet.ibm.com>

	PR target/63965
	* config/rs6000/rs6000.c (rs6000_setup_reg_addr_masks): Do not set
	Altivec & -16 mask if the type is not valid for Altivec registers.
	(rs6000_secondary_reload_memory): Add support for ((reg + const) +
	reg) that occurs during push_reload processing.

	* config/rs6000/altivec.md (altivec_mov<mode>): Add instruction
	alternative for moving constant vectors which are easy altivec
	constants to GPRs.  Set the length attribute each of the
	alternatives.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@218028 138bc75d-0d04-0410-961f-82ee72b054a4
2014-11-24  Tobias Burnus  <burnus@net-b.de>

        * gfortran.dg/coarray_collectives_3.f90: Add dg-excess-errors.
        * gfortran.dg/dollar_sym_1.f90: Ditto.
        * gfortran.dg/dollar_sym_3.f: Ditto.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@218029 138bc75d-0d04-0410-961f-82ee72b054a4