ARM: dts: s5p6442: Move definitions of SoC external clocks to SoC dtsi

Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
[media] exynos4-is: Request syscon only if ISP writeback is present

Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
usb: gadget: Allow compilation of s3c-hsotg on all ARM systems

Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
clk: exynos-audss: convert to platform device

The Exynos AudioSS clock controller will later be modified to allow
input clocks to be specified via device-tree in order to support
multiple Exynos SoCs.  This will introduce a dependency on the core
SoC clock controller being initialized first so that the AudioSS driver
can look up its input clocks, but the order in which clock providers
are probed in of_clk_init() is not guaranteed.  Since deferred probing
is not supported in of_clk_init() and the AudioSS block is not the core
controller, we can initialize it later as a platform device.

Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Acked-by: Tomasz Figa <t.figa@samsung.com>
Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
clk: exynos-audss: allow input clocks to be specified in device tree

This allows the input clocks to the Exynos AudioSS block to be
specified via device-tree bindings.  Default names will be used
when an input clock is not given.

Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
clk: exynos5250: add clock ID for div_pcm0

There is no gate for the PCM clock input to the AudioSS block, so
the parent of sclk_pcm is div_pcm0.  Add a clock ID for it so that
we can reference it in device trees.

Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
ARM: dts: exynos5250: add input clocks to audss clock controller

Specify pll_ref, pll_in, sclk_audio, and sclk_pcm_in for the AudioSS
clock controller.

Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
clk: exynos-audss: add support for Exynos 5420

The AudioSS block on Exynos 5420 has an additional clock gate for the
ADMA bus clock.

Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
ARM: dts: exynos5420: add input clocks to audss clock controller

Specify the remaining input clocks (pll_ref, pll_in, and sclk_pcm_in)
for the AudioSS clock controller.

Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
clk: samsung: Add S5PV210 Audio Subsystem clock driver

This patch adds a driver for clock controller being a part of Audio
Subsystem present on S5PV210 and compatible SoCs. It is used to provide
clocks for other IP blocks of this subsystem.

Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
drm/exynos: fimd: Add support for S5PV210 FIMD variant

Except clksel bit availability, it is identical to Exynos4210.

Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
ARM: dts: s5p6442: Add nodes for remaining IP blocks

Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
ARM: dts: s5p6442: Add missing clocks

Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
ARM: dts: s5p6442: Disable RTC by default

Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
ARM: dts: s5p6442: Add label to rtc node

Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
ARM: dts: s5p6442-pinctl: Use defines for pull modes

Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
ARM: dts: s5p6442-apollo: Use defines for GPIO flags

Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
ARM: dts: s5p6442-apollo: Add nodes for remaining hardware

Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>