signal: Define __ARCH_HAS_SA_RESTORER so we know whether to clear sa_restorer

Vaguely based on upstream commit 574c4866e33d 'consolidate kernel-side
struct sigaction declarations'.

flush_signal_handlers() needs to know whether sigaction::sa_restorer
is defined, not whether SA_RESTORER is defined.  Define the
__ARCH_HAS_SA_RESTORER macro to indicate this.

Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
Cc: Al Viro <viro@zeniv.linux.org.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

Conflicts:
	arch/arm/include/asm/signal.h
	arch/avr32/include/asm/signal.h
	arch/cris/include/asm/signal.h
	arch/h8300/include/asm/signal.h
	arch/m32r/include/asm/signal.h
	arch/m68k/include/asm/signal.h
	arch/mn10300/include/asm/signal.h
	arch/powerpc/include/asm/signal.h
	arch/s390/include/asm/signal.h
	arch/sparc/include/asm/signal.h
	arch/x86/include/asm/signal.h
	arch/xtensa/include/asm/signal.h
	include/asm-generic/signal.h
arm64: fix bad merge in kuser32.S

Change-Id: I66f200a0d0002607b6d4cef0fb9c746c0a4ee14b
Signed-off-by: Greg Hackmann <ghackmann@google.com>
watchdog: tegra: Add panic notifier to trigger fiq

When the watchdog fiq is available add a panic notifier. In the
notifier, set the watchdog timeout to trigger one second before the
panic reboot. This will try to dump a stack trace on every cpu.

Change-Id: I8dee4912deb55f341841525cbdcfe03283d15f38
Signed-off-by: Arve Hjønnevåg <arve@android.com>
net: ipv6: Add a sysctl to make optimistic addresses useful candidates

Add a sysctl that causes an interface's optimistic addresses
to be considered equivalent to other non-deprecated addresses
for source address selection purposes.  Preferred addresses
will still take precedence over optimistic addresses, subject
to other ranking in the source address selection algorithm.

This is useful where different interfaces are connected to
different networks from different ISPs (e.g., a cell network
and a home wifi network).

The current behaviour complies with RFC 3484/6724, and it
makes sense if the host has only one interface, or has
multiple interfaces on the same network (same or cooperating
administrative domain(s), but not in the multiple distinct
networks case.

For example, if a mobile device has an IPv6 address on an LTE
network and then connects to IPv6-enabled wifi, while the wifi
IPv6 address is undergoing DAD, IPv6 connections will try use
the wifi default route with the LTE IPv6 address, and will get
stuck until they time out.

Also, because optimistic nodes can receive frames, issue
an RTM_NEWADDR as soon as DAD starts (with the IFA_F_OPTIMSTIC
flag appropriately set).  A second RTM_NEWADDR is sent if DAD
completes (the address flags have changed), otherwise an
RTM_DELADDR is sent.

Also: add an entry in ip-sysctl.txt for optimistic_dad.

[cherry-pick of net-next 7fd2561e4ebdd070ebba6d3326c4c5b13942323f]

Signed-off-by: Erik Kline <ek@google.com>
Acked-by: Lorenzo Colitti <lorenzo@google.com>
Acked-by: Hannes Frederic Sowa <hannes@stressinduktion.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
Bug: 17769720
Change-Id: Ic7e50781c607e1f3a492d9ce7395946efb95c533
extcon: palmas: hold wakeup source till usb cable detection completes

The system takes some time (~2 sec in flounder)
to detect the USB cable and eventually hold the
"vbus-tegra-otg" wakeup_source. During this
period system attemps an unnecessary suspend.
To prevent this from happening, send a wakeup
event for the usb cable detection to complete.

Relevant log stub:
[   93.655366] Exited suspend state LP0
[   93.682362] palmas-usb extcon.14: vbus-irq() INT3_LINE_STATE 0xc0
[   94.042244] PM: suspend entry 2014-11-11 22:44:08.489170818 UTC
[   95.052942] tegra-udc tegra-udc.0: connected to SDP

Bug: 18192416
Signed-off-by: Badhri Jagan Sridharan <badhri@google.com>
Change-Id: Ia0c2f086c0e316bfad895f147e29c4726a9c9fee
arm64: lib: optimize unaligned memcpy and copy_*

This version uses only aligned accesses to avoid cache line crossing.
To do this, align the source to be 8 byte aligned, read 8 bytes at a
time, write 1, 2, 4, or 8 bytes to the destination depending on the
destination alignment, and then shift the 8 byte value in the
register to do another store (if needed).

Denver is much faster when reads and writes do not cross a cache line
boundary. Naturally aligned accesses imply that no access crosses a
cache line.

This is at least as fast on A57 as the Linaro version on kernel.org.
But, it is twice as fast on Denver when the source or destination is
not 8 byte aligned.

All loads are hoisted away from their counterpart stores in unrolled
loops to avoid stalls.

copy_*_user is faster on A57 and Denver by a large margin because
this version copies up to 128 bytes per iteration instead of the 8
bytes per iteration maximum on the previous version.

Reuse the same code from all of the functions by using LOAD_USER
and STORE_USER macros. In the memcpy case these do nothing. But,
in the case that they access user memory, they add entries to the
ex_table. Note that the offset is the smallest offset from src or dst
that already has all of the data copied.

Change-Id: Iddf91bdcd127577af686ccc21f1f9099a582ee84
Signed-off-by: Alex Van Brunt <avanbrunt@nvidia.com>
arm64: Add AArch32 vDSO support

Support vDSO in AArch32 mode for clock_gettime and gettimeofday.

Change-Id: Ie2125d60d5a0019b8f81ed54c4881d54231a7c85
Signed-off-by: Alex Van Brunt <avanbrunt@nvidia.com>

Conflicts:
	arch/arm64/kernel/Makefile
arm: add AT_SYSINFO_EHDR for vDSO

Add AT_SYSINFO_EHDR to export to userspace even though the arm kernel
does not use this. However, this allows the arm64 kernel to create an
AArch32 vDSO for compat processes.

Change-Id: I7439b3e20b184cac523673eb2e82523a07972953
Signed-off-by: Alex Van Brunt <avanbrunt@nvidia.com>
Merge pull request #1 from nychitman1/android-tegra-flounder-3.10-lollipop-release

Android tegra flounder 3.10 lollipop release