Initial synthesis testing: bunch of typo fixes.
Removed accidental cut-paste
Updated Assembler and hailstone for branch folding test.
Oops. Forgot to include Branch_Origin_Check in Quartus project
More typos and name errors fixed from synthesis tries.
Corrected generate port assignments to sub-vectors.
Manually carried RAM_SDP_no_fw from pattern_match.

This implements the MLAB memories.
Previous OR_reducer did not synthesize!

This one is written as a fold operation, very very manually.