st/mesa: avoid exposing EXT_texture_integer for pre-GLSL 1.30

For drivers building up to GL(ES)3, only expose the actual extension if
the API will let it be used (e.g. via overrides/debug flags that enable
higher versions).

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
freedreno/a4xx: invalidate cache when vbo's change

Otherwise vertex shader can see stale cache data.  This in particular
happens when the same vbo is updated and reused.  Not sure yet if vbo's
at differing addresses but bound to same vertex buffer slot could have
issues, but seems safest to flush whenever new vertex buffers are bound.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
vc4: Add another check for invalid TLB scoreboard handling.

This was caught by an assertion in the simulator.
vc4: Fix assertion about SFU versus texturing.

We're supposed to be checking that nothing else writes r4, which is done
by the TMU result collection signal, not the coordinate setup.

Avoids a regression when QPU instruction scheduling is introduced.
vc4: Also deal with VPM reads at thread end.

Prevents a regression with QPU scheduling, which happens to put the no-op
reads for unused VPM contents end up at the end of the program.
vc4: Drop the explicit scoreboard wait.

This is actually implicitly handled by the TLB operations.
vc4: Introduce scheduling of QPU instructions.

This doesn't reschedule much currently, just tries to fit things into the
regfile A/B write-versus-read slots (the cause of the improvements in
shader-db), and hide texture fetch latency by scheduling setup early and
results collection late (haven't performance tested it).  This
infrastructure will be important for doing instruction pairing, though.

shader-db2 results:
total instructions in shared programs: 61874 -> 59583 (-3.70%)
instructions in affected programs:     50677 -> 48386 (-4.52%)
util: Move u_atomic.h to src/util.

To be shared outside of Gallium.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
util: s/INLINE/inline/ in u_atomic.h.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
util: Remove u_atomic.h's Gallium dependence.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
util: Remove u_atomic.h's MSVC inline assembly.

There was already an intrinsics path that implemented all of the same
functions, plus more.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
util: Remove u_atomic.h's GCC inline assembly.

GCC >= 4.1 support the __sync_* intrinsics. That seems like a
sufficiently old baseline.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
util: Use stdbool.h's bool rather than "boolean".

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
util: Make u_atomic.h typeless.

like how C11's stdatomic.h provides generic functions. GCC's __sync_*
builtins already take a variety of types, so that's simple.

MSVC and Sun Studio don't, but we can implement it with something that
looks a little crazy but is actually quite readable.

Thanks to Jose for some MSVC fixes!

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
util/u_atomic: Add a simple test.

It was much easier for me to verify things build and run as expected
with this simple test, than building and testing whole Mesa.

With scons the test can be build and run merely by doing:

  scons u_atomic_test

Building the test with autotools is left as a future exercise.

Reviewed-by: Matt Turner <mattst88@gmail.com>
util/u_atomic: Fix the unlocked implementation.

It was totally broken:

- p_atomic_dec_zero() was returning the negation of the expected value

- p_atomic_inc_return()/p_atomic_dec_return() was
  post-incrementing/decrementing, hence returning the old value instead
  of the new

- p_atomic_cmpxchg() was returning the new value on success, instead of
  the old

It is clear this never used in the past. I wonder if it wouldn't be better to
yank it altogether.

Reviewed-by: Matt Turner <mattst88@gmail.com>
glsl: Initialize static temporaries_allocate_names once per process.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
i965: Initialize compaction tables once per process.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
i965: Initialize INTEL_DEBUG once per process.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
ra: Don't use regs as the ralloc context.

The i965 backends pass something out of 'screen', which is allocated
per-process, making using this as a ralloc context not thread-safe.

All callers ra_alloc_interference_graph() already ralloc_free() its
return value.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>