Timing model and timing barrier updates:

- Configurable timing model, with two options ("standard" based on the
  current heuristics, and "null" where everything is zero-delay by
  default), controllable via pragma.

  - "null" is default now, because it seems more in line with the
    philosophy in general to make the timing explicit by default. More
    'magical' / automatic timing as a function of a pragma setting
    (perhaps within a region) is sort of like using a macro to apply
    additional performance magic to the uarch.

- Support for top-level pragmas in general in the parser/AST, with the
  appropriate hook to set the timing model for the backend.

- Timing barriers now constrain all pure (non-side-effecting) ops --
  they are effectively unordered w.r.t. pipe timing except for barriers
  and data dependencies.

- Small bugfix in type inference: x[7:0] is 8 bits wide, not 7 bits
  (off-by-one).