Keep only basic SoC designs in MiSoC
targets: add basic KC705
README: update
mor1kx: sync
targets/kc705: use PLL for clocking
gensoc/cpuif: do not generate access functions for registers > 64 bits
targets/ppro: use migen reset synchronizer
platforms/kc705: generate clocks for SDRAM
gensoc: add id for KC705
s6ddrphy: fix DFI interface data width computation
sdramphy/initsequence: rewrite DDR3 initialization sequence
sdramphy/bios: make sdrrd/sdrwr generic
sdramphy: initial K7 DDR3 support
sdramphy/gensdrphy: fix rddata_en generation
lasmicon: add CWL to PHY settings
lasmicon: drive ODT and RESET_N
dfii: drive ODT and RESET_N
bios/sdram: set ODT and RESET_N through DFII
bios/sdram: cleanup
targets/kc705: integrate DDR3