Try to change typical constant AND-masking operations into shifts for ARM

If the constant only contains a string of ones starting from lsb or msb
we can shift out the bits accordingly, opening up some possibilities for
the peephole optimizer to fold at least one shift into another
operation.

git-svn-id: http://svn.freepascal.org/svn/fpc/trunk@26565 3ad0048d-3df7-0310-abae-a5850022a9f2