sunxi: fix CCM MBUS N factor interpretation

N is stored as the exponent of a power of two, so 8 needs to return 3,
4 needs to return 2, etc.

Signed-off-by: Emilio López <emilio@elopez.com.ar>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
sunxi: fast MBUS support on sun7i

For qualifying hardware, we can run MBUS at 400MHz without risking
stability if we raise the DCDC3 voltage to 1.3V

Signed-off-by: Emilio López <emilio@elopez.com.ar>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
sunxi: enable 400MHz MBUS on Cubieboard2 and Cubietruck

This has been tested on 50 pieces of Cubieboard2 by Cubietech and no
issues of any kind were reported.

Signed-off-by: Emilio López <emilio@elopez.com.ar>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
sun5i: Give PLL6 a sane initial value

The upstream kernel does not override PLL values as set by power-on-reset
and/or the bootloader if it can avoid doing so.

The power-on-reset value for PLL6 is 2400MHz, which does not actually work,
the kernel does not know this and 2400 / 48 is 50 MHz, so the kernel happily
tries to use it as is for mmc.

Set PLL6 to a working frequency so that the kernel can use it. This fixes
mmc in the upstream kernel not working on sun5i.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
sunxi: Add Jesurun-Q5 board

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
sunxi: fix gpio pull mask

Signed-off-by: Ma Haijun <mahaijuns@gmail.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
net/designware: Reduce DMA burst length

The GMAC module in Allwinner sunxi SoCs seems to have problems with
burst lenghts > 8.

Signed-off-by: Jens Kuske <jenskuske@gmail.com>
ARM: sunxi: Add GMAC base address and clocks

Signed-off-by: Jens Kuske <jenskuske@gmail.com>
ARM: sunxi: Add GMAC driver

The existing net/designware driver can be used for sunxi GMAC.

Signed-off-by: Jens Kuske <jenskuske@gmail.com>
ARM: sunxi: Let cubietruck use the GMAC driver

Signed-off-by: Jens Kuske <jenskuske@gmail.com>
ARM: sunxi: Enable support for gigabit PHYs

GMAC on cubietruck uses a gigabit PHY.
Enable gigabit PHY support so auto-negotiation is correct.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
ARM: sunxi: Add functions to set pin drive levels

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
ARM: sunxi: Set drive level for GMAC pins

GMAC requires a higher drive level for gigabit speeds.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
ARM: sunxi: GMAC driver phy interface based on config

GMAC in A20 SoC supports MII and RGMII modes.
Support both so we can use GMAC in different boards.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
ARM: sunxi: Do not select unused GMAC pins under RGMII mode

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
ARM: sunxi: Let cubieboard2 use the GMAC driver

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
ARM: sunxi: fix gpio drive mask

According to A10 user manual, the width of the drive configuration
for each pin is only 2 bits. Fix the mask so we don't touch values
for other pins.

Signed-off-by: Ma Haijun <mahaijuns@gmail.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
ARM: sunxi: Add gmac clock macros

Add macros for gmac clock control, instead of using raw values.
Also add comment noting GMAC ahb gate is in second gate register,
to avoid confusion over same offset as EMAC.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
ARM: sunxi: Move GMAC init code into separate glue layer driver

GMAC init code now exists in a glue layer driver under drivers/net,
instead of sunxi board initialization code. It has been cleaned up
to use macros for clock controls.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
ARM: sunxi: Interra-3 home-automation board

Add the interra-3 home-automation board utilizing onboard eMMC on sdc2
instead of the more common NAND.

Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>