- Key size extended to 128.
- Hooks added for inserting AES and RSA.
- I-cache modified so that instead of streaming contents from memory,
  a whole line is fetched, decrypted and sent to the pipeline (as long
  as it can accept) and the i-cache RAMs.
- MMU table-walk extended to bring in 5B (4B key + 1B PTE) from memory
  for ISR pages. This is done in burst mode -- fetching is not done
  byte-by-byte -- thus saving ~40-50 cycles.

TODO
- Hook up the AES and RSA units.
- Check in the proper simulation test cases.