schematics: PORTB hdr changed, 40-pin hdr is back.
schematics: ADDRESS[0..15] renamed to ADDR[0..15] for brevity.
board: components tentatively placed, no routing.
board: routed USB power, jumper, header, caps, LED etc.
board: routed decoupling caps to power pins, etc.
board: routed a few adjacent 5V pins to each other.
board: routed OE and CE to each other on RAM and ROM.
board: alternate grid set to 0.005 as per SparkFun article.
board: ROM and RAM buses routed to each other. Widths changes.

Trace widths changed, possibly across entire board. Needs review later.
board: layout tweaks; oscillators and memory mapping.
board: further layout tweaks.
board: WIP; power routing.
schematics: ERC fixes; expansion header has decoupling cap.

(Does the cap even make sense there? The more the merrier...)