mx6: fix build due to divide u64/u32

This could be fixed by using do_div, but I don't see any reason
for freq to be a u64.  decode_pll() returns a u32, and the
function mxc_get_pll_pdf() also returns a u32.  Therefore by
typing freq as a u32 we remove compilation errors like

libgcc.a(_udivdi3.o) uses VFP register arguments, u-boot does not
CuBox-i and HB board auto detect code

CuBox-i code now autodetect both CuBox-i and HB and accordingly sets machine ID etc...

Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com>
Phy address detection

Due to different microSOM implementations the Atheros phy might appear
in two different addresses; 0x0 or 0x4 (depending on the reset strap
of the LED_ACT ping of the phy).
The microSOM that was with the carrier-one had a pull-down that forced
phy address to 0x0, where the microSOM with the CuBox-i (and future
HummingBoard) doesn't pull down and sometimes it's reset strap is
sampled as '0' and sometimes as '1' thus making the PHY address
either 0x0 or 0x4.

Since u-boot doesn't scan the mii bus this fix registers the phy first
on address 0x0, and upon failure it registers it on address 0x4.

With this patch a minor fix for the ENET_REF_CLK pad is introduced.
The pad doesn't need to pull/keep since it's driven by the phy at
125MHz (the phy's generated clock)

Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com>
fecmxc_initialize_multi change from phy id to phy mask

The fecmxc_initialize_multi now accepts phy address mask instead of a
single phy address.

Modified otherboard that directly uses fecmxc_initialize_multi()

Modified also i.MX6 RXD0/RXD1 pad to pull down (they are also directly
connected to the Atheros 8035/8030 although they should be functional
only in the RMII mode - 8030).

Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com>
part_efi: fix protective mbr struct allocation

The calloc() call was allocating space for the sizeof the struct
pointer rather than for the struct contents.
Besides, since this buffer is passed to mmc for writing and some
platforms may use cache, the legacy_mbr struct should be cache-aligned.

Signed-off-by: Hector Palacios <hector.palacios@digi.com>
Tested-by: Lukasz Majewski <l.majewski@samsung.com>
kbuild: fix SPL link bug when USE_PRIVATE_LIBGCC is "yes"

Commit 6825a95 (kbuild: use Linux Kernel build scripts)
changed the behavior of linkage when USE_PRIAVATE_LIBGCC
is defined as "yes".
(It dropped arch/arm/lib/eabi_compat.o from the
target library.)

Affected boards are all Tegra boards.

This commit gets back the same behavior as before Kbuild series.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Tom Warren <twarren@nvidia.com>
Cc: Tom Rini <trini@ti.com>
power: fix: Do not execute pmic command when not all necessary parameters are passed

Lack of this check resulted in a data abort when CPU tried to execute the
following command (without further mandatory input): 'pmic MAX77686_PMIC'.

Only the 'pmic list' command requires one passed parameter.
Other require at least two valid parameters for correct operation.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
x86: coreboot: delete unused coreboot/config.mk

HOSTCFLAGS_autoconf.mk.dep was added by commit 422322f
but it has never been used.

Cc: Vadim Bendebury <vbendeb@chromium.org>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
arm: delete unused macro CONFIG_ARCH_DEVICE_TREE

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Tom Warren <twarren@nvidia.com>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Rajeshwari Birje <rajeshwari.s@samsung.com>
Cc: Inderpal Singh <inderpal.singh@linaro.org>
boards.cfg: Keep arc entries sorted

Run "tools/reformat.py -i -d '-' -s 8 <boards.cfg >boards0.cfg && mv boards0.cfg boards.cfg"
in order to keep arc entries sorted.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
powerpc/t208x: some update to support t2081

- fix serdes definition for t2081.
- fix clock speed for t2081.
- update ids, as CONFIG_FSL_SATA_V2 is needed only for t2080,
  T2081 has no SATA.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
powerpc/t2081qds: Add T2081 QDS board support

T2081 QDS is a high-performance computing evaluation, development and
test platform supporting the T2081 QorIQ Power Architecture processor.

T2081QDS board Overview
-----------------------
- T2081 SoC integrating four 64-bit dual-threads e6500 cores up to 1.8GHz
- 2MB shared L2 and 512KB L3 CoreNet platform cache (CPC)
- CoreNet fabric supporting coherent and noncoherent transactions with
  prioritization and bandwidth allocation
- 32-/64-bit DDR3/DDR3LP SDRAM memory controller with ECC and interleaving
- Ethernet interfaces:
  - Two on-board 10M/100M/1G bps RGMII ports
  - Two 10Gbps XFI with on-board SFP+ cage
  - 1Gbps/2.5Gbps SGMII Riser card
  - 10Gbps XAUI Riser card
- Accelerator:
  - DPAA components consist of FMan, BMan, QMan, PME, DCE and SEC
- SerDes:
  - 8 lanes up to 10.3125GHz
  - Supports SGMII, HiGig, XFI, XAUI and Aurora debug,
- IFC:
  - 512MB NOR Flash, 2GB NAND Flash, PromJet debug port and Qixis FPGA
- eSPI:
  - Three SPI flash (16MB N25Q128A + 16MB EN25S64 + 512KB SST25WF040)
- USB:
  - Two USB2.0 ports with internal PHY (one Type-A + one micro Type mini-AB)
- PCIe:
  - Four PCI Express controllers (two PCIe 2.0 and two PCIe 3.0 with SR-IOV)
- eSDHC:
  - Supports various SD/SDHC/SDXC/eMMC devices with adapter cards and
    voltage translators
- I2C:
  - Four I2C controllers.
- UART:
  - Dual 4-pins UART serial ports

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
SPL: powerpc: expand SPL's length to 128K

1. The SPL's length of SDCARD boot has not enough,expand the SPL's
length to 128K.
2. deleted unused symbol: CONFIG_SYS_RUN_INDDR

Signed-off-by: Ying Zhang <b40530@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
SPL: P2020RDB: fix the problem booting from spi flash

There was no enough stack in SPL, so the buffer needed in SPL is to malloc
from memory pool and to repalce the temporary variable.

Signed-off-by: Ying Zhang <b40530@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
SPL: P1022DS: fix the problem booting from spi flash

There was no enough memory for malloc in SPL booting from spi flash, so
relayout the memory in SPL: reduce the memory for global data from 16K
Bytes to 4K Bytes, save the space for malloc.

Signed-off-by: Ying Zhang <b40530@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
powerpc: p1010rdb: Enable p1010rdb to start from NAND/SD/SPI flash with SPL

In the previous patches, we introduced the SPL/TPL fraamework.
For SD/SPI flash booting way, we introduce the SPL to enable a loader stub. The
SPL was loaded by the code from the internal on-chip ROM. The SPL initializes
the DDR according to the SPD and loads the final uboot image into DDR, then
jump to the DDR to begin execution.

For NAND booting way, the nand SPL has size limitation on some board(e.g.
P1010RDB), it can not be more than 8KB, we can call it "minimal SPL", So the
dynamic DDR driver doesn't fit into this minimum SPL. We added the TPL that is
loaded by the the minimal SPL. The TPL initializes the DDR according to the SPD
and loads the final uboot image into DDR,then jump to the DDR to begin execution.

This patch enabled SPL/TPL for P1010RDB to support starting from NAND/SD/SPI
flash with SPL framework and initializing the DDR according to SPD in the SPL/TPL.
Because the minimal SPL load the TPL to L2 SRAM and the jump to the L2 SRAM to
execute, so the section .resetvec is no longer needed.

Signed-off-by: Ying Zhang <b40530@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
ar8031/8033/phy:enable autonegotiation for ar8031/8033

Function "genphy_parse_link()" used "if (mii_reg & BMSR_ANEGCAPABLE)" before
while "if (phydev->supported & SUPPORTED_Autoneg)" now.
So assign "phydev->supported" to "phydev->drv->features" for ar8031/8033
to enable autonegotiation.

Signed-off-by: Zhao Qiang <B45475@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
powerpc/mpc8536DS:Increase binary size for mpc8536DS board

u-boot binary size for Freescale mpc8536DS platforms is 512KB.
This has been reached to upper limit of the platforms and causig
linker error. So increase the u-boot binary size to 768KB.

Signed-off-by: Haijun Zhang <Haijun.Zhang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
fsl/usb: Limit phy_type comparison to first four characters

Use first four characters for phy_type comparison. Strcmp() should not
be used to check the phy_type string which maybe parsed by hwconfig_subarg().
Hwconfig_subarg() returns part of hwconfig string starting from
phy_type value till the end of the string. Since phy_type could be
either "utmi" or "ulpi", strncmp() should be used so that a comparison
of "utmi;fsl_ddr:bank_intlv=auto" with "utmi" will succeed.

Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Makefile: add a new script to check -fstack-usage support

If -fstack-usage option is given to crosstools
that do not support it, gcc displays a warning message
but still exits with status 0.

This means we can not rely on $(call cc-option,...)
to detect if -fstack-usage option is supported or not.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>