msm: memutils: memcpy, memmove optimization

1. To fit 8x26 64-bytes cache line size, we change preload steps as 64Bytes.
2. According to tune result, change preload distance as 5 cache lines.
3. According to tune result, re-arrange the ld/str order as back-to-back
   for copy_from_user.

The markable improvement:
	memcpy : 5%
	copy_to_user : 9%
	copy_from_user : 13%
	memmove : 37%

Raw data is as below:

BASELINE:
	memcpy 1000MB at 5MB       : took 1547098 usec, bandwidth 646.646 MB/s
	copy_to_user 1000MB at 5MB : took 1704308 usec, bandwidth 586.586 MB/s
	copy_from_user 1000MB at 5M: took 1777090 usec, bandwidth 562.562 MB/s
	memmove 1000GB at 5MB      : took 1066205 usec, bandwidth 937.937 MB/s
	copy_to_user 1000GB at 4kB : took 1774866 usec, bandwidth 563.563 MB/s
	copy_from_user 1000GB at 4k: took 1797654 usec, bandwidth 556.556 MB/s
	copy_page 1000GB at 4kB    : took 1644606 usec, bandwidth 608.608 MB/s
	memmove 1000GB at 4kB      : took 1236227 usec, bandwidth 808.808 MB/s

THIS PATCH:
	memcpy 1000MB at 5MB       : took 1475835 usec, bandwidth 677.677 MB/s
	copy_to_user 1000MB at 5MB : took 1559060 usec, bandwidth 641.641 MB/s
	copy_from_user 1000MB at 5M: took 1561603 usec, bandwidth 640.640 MB/s
	memmove 1000GB at 5MB      : took 861664 usec, bandwidth 1160.160 MB/s
	copy_to_user 1000GB at 4kB : took 1673501 usec, bandwidth 597.597 MB/s
	copy_from_user 1000GB at 4k: took 1674006 usec, bandwidth 597.597 MB/s
	copy_page 1000GB at 4kB    : took 1691358 usec, bandwidth 591.591 MB/s
	memmove 1000GB at 4kB      : took 882985 usec, bandwidth 1132.132 MB/s

Change-Id: I83bec3b7a9dd9cd88890eaa7ec423363e230a651
Signed-off-by: Hong-Mei Li <a21834@motorola.com>
Reviewed-on: http://gerrit.pcs.mot.com/550383
SLT-Approved: Slta Waiver <sltawvr@motorola.com>
Tested-by: Jira Key <jirakey@motorola.com>
Reviewed-by: Klocwork kwcheck <klocwork-kwcheck@sourceforge.mot.com>
Reviewed-by: Check Patch <CHEKPACH@motorola.com>
Reviewed-by: Yi-Wei Zhao <gbjc64@motorola.com>
Submit-Approved: Jira Key <jirakey@motorola.com>
cpufreq_intellimm: intelliminmax cpu governor initial baseline commit

intelliminmax (intellimm) governor is designed to work with the newer SOCs with fixed voltage rails (ie MSM8974+ SOCs).  It is designed to work within those
fixed voltage ranges in order to maximize battery performance while creating a
smooth UI operations.

Copyright 2014 Paul Reioux <aka faux123>

Signed-off-by: Paul Reioux <reioux@gmail.com>

WIP: Intellimm: remove unused code and change tblmap algorithm

tblmap: add power-save frequencies for the first 5 entries

Signed-off-by: Paul Reioux <reioux@gmail.com>

WIP: intellimm: more tweaks and table clean up

Signed-off-by: Paul Reioux <reioux@gmail.com>

WIP: intellimm: more tweaks

Signed-off-by: Paul Reioux <reioux@gmail.com>

WIP: intellimm: clean up derpy logic

Signed-off-by: Paul Reioux <reioux@gmail.com>

WIP: intellimm: final clean up and algorithm tweaks

Signed-off-by: Paul Reioux <reioux@gmail.com>

WIP: intellimm: finalizing part 2

Signed-off-by: Paul Reioux <reioux@gmail.com>

WIP: intellimm: finalizing part 3

add back burst for smoother UI

Signed-off-by: Paul Reioux <reioux@gmail.com>

intellimm: fix div by zero derp

Signed-off-by: Paul Reioux <reioux@gmail.com>

Conflicts:
	drivers/cpufreq/Kconfig
	drivers/cpufreq/Makefile
	include/linux/cpufreq.h
ghost: stock: Revert bulk of CAF patches and reverts

Signed-off-by: Zhao Wei Liew <zhaoweiliew@gmail.com>