msm: kgsl: enable CPU IRQ while suspending context

Make sure that CPU interrupt is enabled before calling adreno
suspend_context when moving from NAP/SLEEP to SUSPEND state.
We send commands to GPU in adreno_drawctxt_switch() which will generate
GPU interrupt. Since CPU interrupt is not enabled, adreno_idle() will
fail because pending interrupt will not be served by CPU this causes
false GPU hang.

Change-Id: I57b7a72292bda380a3aa83e0a26435d8e5b58871
Signed-off-by: Prakash Kamliya <pkamliya@codeaurora.org>
msm: kgsl: Get reference to process private when attaching mem entry

When a memory entry is attached with to a process private list then
increment the refcount of the process private structure so that the
structure is valid as long as the entry is around. The context
structure is also handled in similar manner. Also, the refcount to
the entry needs to be decremented when the handle that created the
entry goes away and not when the process private structure is
destroyed.

Conflicts:
        drivers/gpu/msm/kgsl.c

Change-Id: I225698ad4081947a93eb553104e5259bbf31f293
Signed-off-by: Shubhraprakash Das <sadas@codeaurora.org>
Signed-off-by: Hareesh Gundu <hareeshg@codeaurora.org>
msm: kgsl: Add a missing refcount put for kgsl_context

Fix a potential memory leak by putting in the missing
kgsl_context_put() in ft detect for kgsl_context

Change-Id: I2673cdcc5a8ab9caf4d9adbfd9b3aa528348d945
Signed-off-by: Prakash Kamliya <pkamliya@codeaurora.org>
msm: kgsl: Skip hang check for 2d devices
kgsl hung check is used for 3d device but while creating a 2d
device we are creating a hung timer and check for hung in 3d
device, Which is not logically correct. Some time it causes kernal panic
when device type is 2d and we try to access 3d device registers etc

Change-Id: I82d7c4ca542f33529357c336daa36a66153adcd3
Signed-off-by: Gaurav Gagrani <ggagrani@codeaurora.org>
msm: kgsl: Verify the user address before reading a perfcounter group

In adreno_perfcounter_read_group some user input verification is
occuring on a user pointer before copy_from_user is called
resulting in a possible segmentation fault if called with improper
input data.

CRs-fixed: 553314
Change-Id: Ic0dedbad4c5e4b2610368d51ff591d1f716712f4
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
msm: kgsl: Fix Z180 memory leak

Decerement entry refcount, which incremented
in kgsl_sharedmem_find_region.

CRs-Fixed: 635747
Change-Id: I621ba8f8e119a9ab8ba5455b28a565e3cae2f7cd
Signed-off-by: Hareesh Gundu <hareeshg@codeaurora.org>
msm: kgsl: fix a race condition when calling kref_put

Fix a race condition which can occur if a thread tries to acquire
a reference to a mem_entry or context while another thread has
already decremented the refcount to 0 and is in the process of
destroying said mem_entry or context.

CRs-Fixed: 635747
Change-Id: I6be64ca75f9cb12b03e870b9ca83588197c64e5e
Signed-off-by: Hareesh Gundu <hareeshg@codeaurora.org>
msm: kgsl: Release process mutex appropriately to avoid deadlock

There is a deadlock situation between
msm_iommu_lock mutex and process_mutex.

In irq context iommu_fault_handler get into
a deadlock by aquiring msm_iommu_lock and waiting
for process mutex. The other thread in
destroy_process_private is waiting for
msm_iommu_lock while holding process mutex leading
to a deadlock. With this change we release the
process mutex well before we call the function
in which msm_iommu_lock is taken.

Change-Id: I674a7512dcd3e7fe202e39b57539cb6c1e29ae0e
Signed-off-by: Sunil Khatri <sunilkh@codeaurora.org>
msm: kgsl: Increase IDLE_TIMEOUT for 2D core to 20secs

Increasing the hang detection time for 2D core from
10 secs to 20 secs to avoid False GPU Hangs.
Some c2d test cases are taking more than 10 secs
to process which results in a False GPU Hang.

CRs-Fixed: 454439, 644283
Change-Id: Ice5e4b719adb44cd13fb8164bafedce1049416f7
Signed-off-by: Hareesh Gundu <hareeshg@codeaurora.org>
msm: kgsl: Fix GPU hang recovery logic

During new commands submission, if the write pointer
is ahead of read pointer fill ringbuffer data with
KGSL_NOP_DATA_FILLER after NOP command. This will
avoids getting incorrect context ID from the ringbuffer
extraction logic during GPU recovery.

CRs-Fixed: 620533
Change-Id: If4d25770b7288bc6fb618611c150e3876cc87c6f
Signed-off-by: Hareesh Gundu <hareeshg@codeaurora.org>
msm: kgsl: Reset VSC control registers

Configure the A2xx VSC register in context switch,
which helps GPU to recover from the bad state.

CRs-Fixed: 637288
Change-Id: I2000a579614c491a015c618a52808500541329c5
Signed-off-by: Hareesh Gundu <hareeshg@codeaurora.org>
msm: kgsl: Fix for panic in z180 postmortem dumps

We were accessing z180 registers without holding
device mutex. This change ensures that we hold the
mutex before accessing z180's registers

CRs-Fixed: 644283
Change-Id: Ib6496c427fc6c9a3f97a6720adb80a390fe21b0d
Signed-off-by: Gaurav Gagrani <ggagrani@codeaurora.org>
Signed-off-by: Hareesh Gundu <hareeshg@codeaurora.org>
msm: kgsl: Setup a3xx protection in its start function

Setup the protection registers for a3xx towards the end of its
start function instead of doing it in generic ringbuffer start

Conflicts:
	drivers/gpu/msm/adreno_ringbuffer.c

Change-Id: I66df496afa5d1fdf7dea790306f5358c2098674d
Signed-off-by: Shubhraprakash Das <sadas@codeaurora.org>
Signed-off-by: Hareesh Gundu <hareeshg@codeaurora.org>
msm: kgsl: Enable protected register mode for A3XX

Turn on protected register mode for the A3XX GPU family and add 0x63
(RBBM_INT_0_MASK) to the list of protected registers.

Conflicts:
	drivers/gpu/msm/adreno.h
	drivers/gpu/msm/adreno_a3xx.c
	drivers/gpu/msm/adreno_ringbuffer.c

Change-Id: Ic0dedbad10ebfa6eb6d3d815b5aa9b6b6f0e8e35
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Hareesh Gundu <hareeshg@codeaurora.org>
msm: kgsl: Protect SMMU registers from being written by the GPU

Put the SMMU register range in protected mode to shield them from
IB1/IB2 writes from userspace.

CRs-Fixed: 599971
Change-Id: Ic0dedbad8c03fc1c54ff73221231e2440d3c34dd
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Hareesh Gundu <hareeshg@codeaurora.org>
msm: kgsl: Print the register that causes a protected mode error

When we get a protected mode error print out the register information
that caused the exception.

Change-Id: Ic0dedbad4f586c5715669226619b51665ef9681f
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Hareesh Gundu <hareeshg@codeaurora.org>
msm: kgsl: Protect CP_STATE_DEBUG_INDEX

Put CP_STATE_DEBUG_INDEX and CP_STATE_DEBUG_DATA under protection
to keep it from being written from an IB1. Doing so however opens
up a subtle "feature" in the microcode: memory read opcodes turn off
protected mode in the microcode to do the read and then turns it
back on regardless of the initial state. This is a problem if the
memory read happens while protected mode is turned off and then we
try to access a protected register which then complains and goes boom.

To account for this irregularity explicitly turn back off protected
mode in all the places where we know this will be a problem.

Conflicts:
	drivers/gpu/msm/adreno.c
	drivers/gpu/msm/adreno_a3xx.c

Change-Id: Ic0dedbad1397ca9b80132241ac006560a615e042
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Hareesh Gundu <hareeshg@codeaurora.org>
msm: kgsl: Mark the IOMMU setstate memory as read only

Mark the IOMMU setstate memory as read only in the pagetable.

Change-Id: Ic0dedbadb19e499c749cd744c3e89be3bcb4c2a2
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Hareesh Gundu <hareeshg@codeaurora.org>
msm: kgsl: Enable protected register mode for A2XX

Turn on protected register mode for the A2XX GPU family.

Change-Id: Iecf88d648c9f86faef4fa53e90c2ce81101c58fa
Signed-off-by: Hareesh Gundu <hareeshg@codeaurora.org>