gcc:

2014-10-21  Joern Rennecke  <joern.rennecke@embecosm.com>
	    Vidya Praveen <vidya.praveen@atmel.com>
	    Praveen Kumar Kaushik <Praveen_Kumar.Kaushik@atmel.com>
	    Senthil Kumar Selvaraj <Senthil_Kumar.Selvaraj@atmel.com>
	    Pitchumani Sivanupandi <Pitchumani.S@atmel.com>

	* config/avr/avr-c.c (avr_cpu_cpp_builtins): Don't define
	__MEMX for avrtiny.
	* config/avr/avr.c (avr_insert_attributes): Reject __memx for avrtiny.
	(avr_nonconst_pointer_addrspace): Likewise.
	* config/avr/avr.h (AVR_HAVE_LPM): Define.

	Added AVRTINY architecture to avr target.
	* config/avr/avr-arch.h (avr_arch): Added AVRTINY architecture.
	(base_arch_s): member added for AVRTINY architecture.
	* config/avr/avr.c: Added TINY_ADIW, TINY_SBIW macros as AVRTINY
	alternate for adiw/sbiw instructions. Added AVR_TMP_REGNO and
	AVR_ZERO_REGNO macros for tmp and zero registers. Replaced TMP_REGNO
	and ZERO_REGNO occurrences by AVR_TMP_REGNO and AVR_ZERO_REGNO
	respectively. LAST_CALLEE_SAVED_REG macro added for the last register
	in callee saved register list.
	(avr_option_override): CCP address updated for AVRTINY.
	(avr_init_expanders): tmp and zero rtx initialized as per arch.
	Reset avr_have_dimode if AVRTINY.
	(sequent_regs_live): Use LAST_CALLEE_SAVED_REG instead magic number.
	(emit_push_sfr): Use AVR_TMP_REGNO for tmp register number.
	(avr_prologue_setup_frame): Don't minimize prologue if AVRTINY.
	Use LAST_CALLEE_SAVED_REG to refer last callee saved register.
	(expand_epilogue): Likewise.
	(avr_print_operand): Print CCP address in case of AVRTINY also.
	<TBD>bad address
	(function_arg_regno_p): Check different register list for arguments
	if AVRTINY.
	(init_cumulative_args): Check for AVRTINY to update number of argument
	registers.
	(tiny_valid_direct_memory_access_range): New function. Return false if
	direct memory access range is not in accepted range for AVRTINY.
	(avr_out_movqi_r_mr_reg_disp_tiny): New function to handle register
	indirect load (with displacement) for AVRTINY.
	(out_movqi_r_mr): Updated instruction length for AVRTINY. Call
	avr_out_movqi_r_mr_reg_disp_tiny for load from reg+displacement.
	(avr_out_movhi_r_mr_reg_no_disp_tiny): New function to handle register
	indirect load (no displacement) for AVRTINY.
	(avr_out_movhi_r_mr_reg_disp_tiny): New function to handle register
	indirect load (with displacement) for AVRTINY.
	(avr_out_movhi_r_mr_pre_dec_tiny): New function to handle register
	indirect load for pre-decrement address.
	(out_movhi_r_mr): In case of AVRTINY, call tiny register indirect load
	functions. Update instruction length for AVRTINY.
	(avr_out_movsi_r_mr_reg_no_disp_tiny): New function. Likewise, for
	SImode.
	(avr_out_movsi_r_mr_reg_disp_tiny): New function. Likewise, for SImode.
	(out_movsi_r_mr): Likewise, for SImode.
	(avr_out_movsi_mr_r_reg_no_disp_tiny): New function to handle register
	indirect store (no displacement) for AVRTINY.
	(avr_out_movsi_mr_r_reg_disp_tiny): New function to handle register
	indirect store (with displacement) for AVRTINY.
	(out_movsi_mr_r): Emit out insn for IO address store. Update store
	instruction's size for AVRTINY. For AVRTINY, call tiny SImode indirect
	store functions.
	(avr_out_load_psi_reg_no_disp_tiny): New function to handle register
	indirect load (no displacement) for PSImode in AVRTINY.
	(avr_out_load_psi_reg_disp_tiny): New function to handle register
	indirect load (with displacement) for PSImode in AVRTINY.
	(avr_out_load_psi): Call PSImode register indirect load functions for
	AVRTINY. Update instruction length for AVRTINY.
	(avr_out_store_psi_reg_no_disp_tiny): New function to handle register
	indirect store (no displacement) for PSImode in AVRTINY.
	(avr_out_store_psi_reg_disp_tiny): New function to handle register
	indirect store (with displacement) for PSImode in AVRTINY.
	(avr_out_store_psi): Update instruction length for AVRTINY. Call tiny
	register indirect store functions for AVRTINY.
	(avr_out_movqi_mr_r_reg_disp_tiny): New function to handle QImode
	register indirect store (with displacement) for AVRTINY.
	(out_movqi_mr_r): Update instruction length for AVRTINY. Call tiny
	register indirect store function for QImode in AVRTINY.
	(avr_out_movhi_mr_r_xmega): Update instruction length for AVRTINY.
	(avr_out_movhi_mr_r_reg_no_disp_tiny): New function to handle register
	indirect store (no displacement) for HImode in AVRTINY.
	(avr_out_movhi_mr_r_reg_disp_tiny): New function to handle register
	indirect store (with displacement) for HImode in AVRTINY.
	(avr_out_movhi_mr_r_post_inc_tiny): New function to handle register
	indirect store for post-increment address in HImode.
	(out_movhi_mr_r): Update instruction length for AVRTINY. Call tiny
	register indirect store function for HImode in AVRTINY.
	(avr_out_compare): Use TINY_SBIW/ TINY_ADIW in place of sbiw/adiw
	in case of AVRTINY.
	(order_regs_for_local_alloc): Updated register allocation order for
	AVRTINY.
	(avr_conditional_register_usage): New function. It is a target hook
	(TARGET_CONDITIONAL_REGISTER_USAGE) function which updates fixed, call
	used registers list and register allocation order for AVRTINY.
	(avr_return_in_memory): Update return value size for AVRTINY.
	* config/avr/avr-c.c (avr_cpu_cpp_builtins): Added builtin macros
	for AVRTINY arch and tiny program memory base address.
	* config/avr/avr-devices.c (avr_arch_types): Added AVRTINY arch.
	(avr_texinfo): Added description for AVRTINY arch.
	* config/avr/avr.h: Added macro to identify AVRTINY arch. Updated
	STATIC_CHAIN_REGNUM for AVRTINY.
	* config/avr/avr-mcus.def: Added AVRTINY arch devices.
	* config/avr/avr.md: Added constants for tmp/ zero registers in
	AVRTINY. Attributes for AVRTINY added.
	(mov<mode>): Move src/ dest address to register if it is not in AVRTINY
	memory access range.
	(mov<mode>_insn): Avoid QImode direct load for AVRTINY if address not
	in AVRTINY memory access range.
	(*mov<mode>): Likewise for HImode and SImode.
	(*movsf): Likewise for SFmode.
	(delay_cycles_2): Updated instructions to be emitted as AVRTINY does
	not have sbiw.
	* config/avr/avr-protos.h: Added function prototype for
	tiny_valid_direct_memory_access_range.
	* config/avr/avr-tables.opt: Regenerate.
	* gcc/config/avr/t-multilib: Regenerate.
	* doc/avr-mmcu.texi: Regenerate.

gcc/testsuite:

2014-10-21  Joern Rennecke  <joern.rennecke@embecosm.com>

	* gcc.target/avr/tiny-memx.c: New test.

	* gcc.target/avr/tiny-caller-save.c: New test.

libgcc:

2014-10-21  Joern Rennecke  <joern.rennecke@embecosm.com>
	    Vidya Praveen <vidya.praveen@atmel.com>
	    Praveen Kumar Kaushik <Praveen_Kumar.Kaushik@atmel.com>
	    Senthil Kumar Selvaraj <Senthil_Kumar.Selvaraj@atmel.com>
	    Pitchumani Sivanupandi <Pitchumani.S@atmel.com>

	* config/avr/lib1funcs.S (__do_global_dtors): Go back to descending
	order.

	Updated library functions for AVRTINY arch.
	* config/avr/lib1funcs.S: Updated zero/tmp regs for AVRTINY.
	Replaced occurrences of r0/r1 with tmp/zero reg macros.
	Added wsubi/ wadi macros that expands conditionally as sbiw/ adiw
	or AVRTINY equivalent. Replaced occurrences of sbiw/adiw with
	wsubi/wadi macors.
	(__mulsi3_helper): Update stack, preserve callee saved regs and
	argument from stack. Restore callee save registers.
	(__mulpsi3): Likewise.
	(__muldi3, __udivmodsi4, __divmodsi4, __negsi2, __umoddi3, __udivmod64,
	__moddi3, __adddi3, __adddi3_s8, __subdi3, __cmpdi2, __cmpdi2_s8,
	__negdi2, __prologue_saves__, __epilogue_restores__): Excluded for 
	AVRTINY.
	(__tablejump2__): Added lpm equivalent instructions for AVRTINY.
	(__do_copy_data): Added new definition for AVRTINY.
	(__do_clear_bss): Replace r17 by r18 to preserve zero reg for AVRTINY.
	(__load_3, __load_4, __xload_1, __xload_2, __xload_3,
	__xload_4, __movmemx_qi, __movmemx_hi): Excluded for AVRTINY.
	* config/avr/lib1funcs-fixed.S: Replaced occurrences of r0/r1 with
	tmp/zero reg macros. Replaced occurrences of sbiw/adiw with wsubi/wadi
	macors.
	   * config/avr/t-avr (LIB1ASMFUNCS): Remove unsupported functions for
	AVRTINY.

	Fix broken long multiplication on tiny arch.         



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@216525 138bc75d-0d04-0410-961f-82ee72b054a4
2014-10-21 Manuel López-Ibáñez  <manu@gcc.gnu.org>

	* doc/invoke.texi (pedantic-errors): Explain better.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@216528 138bc75d-0d04-0410-961f-82ee72b054a4
	* config.gcc: Remove MASK_JUMP_IN_DELAY from target_cpu_default2.
	* config/pa/pa.h (TARGET_DEFAULT): Remove MASK_JUMP_IN_DELAY.
	* config/pa/pa.opt (mjump-in-delay): Ignore option.  Update comment.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@216530 138bc75d-0d04-0410-961f-82ee72b054a4
Daily bump.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@216538 138bc75d-0d04-0410-961f-82ee72b054a4
gcc/
	* gengtype.h (obstack_chunk_alloc, obstack_chunk_free): Remove cast.
	* coretypes.h (obstack_chunk_alloc, obstack_chunk_free): Likewise.
	(gcc_obstack_init): Use obstack_specify_allocation in place of
	_obstack_begin.
	* genautomata.c (next_sep_el): Cast result of obstack_base to (char *).
	(regexp_representation): Likewise.
	* godump.c (go_output_type): Likewise.
gcc/java/
	* mangle.c (finish_mangling): Cast result of obstack_base to (char *).
	* typeck.c (build_java_argument_signature): Likewise.
	(build_java_signature): Likewise.
gcc/objc/
	* objc-encoding.c (encode_array): Cast result of obstack_base.
	(encode_type): Likewise.
libcpp/
	* symtab.c (ht_create): Use obstack_specify_allocation in place of
	_obstack_begin.
	* files.c (_cpp_init_files): Likewise.
	* init.c (cpp_create_reader): Likewise.
	* identifiers.c (_cpp_init_hashtable): Likewise.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@216539 138bc75d-0d04-0410-961f-82ee72b054a4
	PR target/63542
	* config/i386/i386.c (ix86_pic_register_p): Also return
	true if x is a hard register with ORIGINAL_REGNO equal to
	pic_offset_table_rtx pseudo REGNO.
	(ix86_delegitimize_address): For ix86_use_pseudo_pic_reg ()
	after reload, subtract GOT_SYMBOL_NAME symbol if possible.

	* gcc.target/i386/pr63542-1.c: New test.
	* gcc.target/i386/pr63542-2.c: New test.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@216540 138bc75d-0d04-0410-961f-82ee72b054a4
	PR target/63594
	* config/i386/i386.c (ix86_expand_vector_init_duplicate): For
	V{8HI,16QI,16HI,32QI}mode call ix86_vector_duplicate_value
	even for just TARGET_AVX2, not only for
	TARGET_AVX512VL && TARGET_AVX512BW.  For V{32HI,64QI}mode,
	call ix86_vector_duplicate_value only if TARGET_AVX512BW,
	otherwise build it using concatenation of 256-bit
	broadcast.
	* config/i386/sse.md (AVX_VEC_DUP_MODE): Moved after
	avx512 broadcast patterns.
	(vec_dup<mode>): Likewise.  For avx2 use
	v<sseintprefix>broadcast<bcstscalarsuff> instead of
	vbroadcast<ssescalarmodesuffix>.
	(AVX2_VEC_DUP_MODE): New mode iterator.
	(*vec_dup<mode>): New TARGET_AVX2 define_insn with
	AVX2_VEC_DUP_MODE iterator, add a splitter for that.

	* gcc.dg/pr63594-1.c: New test.
	* gcc.dg/pr63594-2.c: New test.
	* gcc.target/i386/sse2-pr63594-1.c: New test.
	* gcc.target/i386/sse2-pr63594-2.c: New test.
	* gcc.target/i386/avx-pr63594-1.c: New test.
	* gcc.target/i386/avx-pr63594-2.c: New test.
	* gcc.target/i386/avx2-pr63594-1.c: New test.
	* gcc.target/i386/avx2-pr63594-2.c: New test.
	* gcc.target/i386/avx512f-pr63594-1.c: New test.
	* gcc.target/i386/avx512f-pr63594-2.c: New test.
	* gcc.target/i386/avx512f-vec-init.c: Adjust expected
	insn counts.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@216541 138bc75d-0d04-0410-961f-82ee72b054a4
2014-10-22  Richard Biener  <rguenther@suse.de>
	Prathamesh Kulkarni  <bilbotheelffriend@gmail.com>

	* Makefile.in (OBJS): Add gimple-match.o and generic-match.o.
	(MOSTLYCLEANFILES): Add gimple-match.c and generic-match.c.
	(gimple-match.c): Generate by triggering s-match.
	(generic-match.c): Likewise.
	(s-match): Rule to build gimple-match.c and generic-match.c
	by running the genmatch generator program.
	(build/hash-table.o): Dependencies to build hash-table.c for the host.
	(build/genmatch.o): Dependencies to build genmatch.
	(genprog): Add match.
	(build/genmatch): Likewise.
	(TEXI_GCCINT_FILES): Add match-and-simplify.texi.
	* generic-match-head.c: New file.
	* gimple-match-head.c: Likewise.
	* gimple-match.h: Likewise.
	* genmatch.c: Likewise.
	* match.pd: Likewise.
	* builtins.h (fold_builtin_n): Export.
	* builtins.c (fold_builtin_n): Likewise.
	* gimple-fold.h (gimple_build): Declare various overloads.
	(gimple_simplify): Likewise.
	(gimple_convert): Re-implement in terms of gimple_build.
	* gimple-fold.c (gimple_convert): Remove.
	(gimple_build): New functions.

	* doc/match-and-simplify.texi: New file.
	* doc/gccint.texi: Add menu item Match and Simplify and include
	match-and-simplify.texi.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@216542 138bc75d-0d04-0410-961f-82ee72b054a4
[Dejagnu] fix gcc-dg-prune glitch when filtering "relocation truncation" error

  gcc/testsuite/
    * lib/compat.exp (compat-run): Remove "unresolved".
    * lib/gcc-defs.exp (${tools}_check_compile): Update code logic for
    unsupported testcase.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@216543 138bc75d-0d04-0410-961f-82ee72b054a4
[AArch64] Update target testcases for gnu11

  gcc/testsuite/
    * gcc.target/aarch64/pic-constantpool1.c: Add explicit declaration.
    * gcc.target/aarch64/pic-symrefplus.c: Likewise.
    * gcc.target/aarch64/reload-valid-spoff.c: Likewise.
    * gcc.target/aarch64/vect.x: Likewise.
    * gcc.target/aarch64/vect-ld1r.x: Add return type.
    * gcc.target/aarch64/vect-fmax-fmin.c: Likewise.
    * gcc.target/aarch64/vect-fp.c: Likewise.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@216544 138bc75d-0d04-0410-961f-82ee72b054a4
2014-10-22  Richard Biener  <rguenther@suse.de>

	* Makefile.in (s-match): Adjust dependencies to only catch
	match.pd.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@216545 138bc75d-0d04-0410-961f-82ee72b054a4
[ARM] Add ACLE 2.0 predefined marco __ARM_FEATURE_IDIV

2014-10-22  Renlin Li <renlin.li@arm.com>

  gcc/
    * config/arm/arm.h (TARGET_CPU_CPP_BUILTINS): Define
    __ARM_FEATURE_IDIV__.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@216547 138bc75d-0d04-0410-961f-82ee72b054a4
[ARM] Add missing '\' in macro define.

  gcc/
    * config/arm/arm.h (TARGET_CPU_CPP_BUILTINS): Add missing '\'.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@216548 138bc75d-0d04-0410-961f-82ee72b054a4
	* config/avr/lib1funcs.S (__do_global_dtors): Fix wrong code
	introduced with 2014-10-21 trunk r216525.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@216550 138bc75d-0d04-0410-961f-82ee72b054a4
New syntax for -fsanitize-recover.

2014-10-22  Jakub Jelinek  <jakub@redhat.com>
	    Yury Gribov  <y.gribov@samsung.com>

gcc/
	* common.opt (flag_sanitize_recover): New variable.
	(fsanitize-recover): Remove Var/Init, deprecate.
	(fsanitize-recover=): New option.
	* doc/invoke.texi (fsanitize-recover): Update docs.
	* opts.c (finish_options): Use opts->x_flag_sanitize
	instead of flag_sanitize.  Prohibit -fsanitize-recover
	for anything besides UBSan.  Formatting.
	(common_handle_option): Handle OPT_fsanitize_recover_
	and OPT_fsanitize_recover.  Use opts->x_flag_sanitize
	instead of flag_sanitize.
	* asan.c (pass_sanopt::execute): Fix up formatting.
	* ubsan.c (ubsan_expand_bounds_ifn, ubsan_expand_null_ifn,
	ubsan_expand_objsize_ifn, ubsan_build_overflow_builtin,
	instrument_bool_enum_load, ubsan_instrument_float_cast,
	instrument_nonnull_arg, instrument_nonnull_return): Check
	bits in flag_sanitize_recover bitmask instead of
	flag_sanitize_recover as bool flag.

gcc/c-family/
	* c-ubsan.c (ubsan_instrument_division, ubsan_instrument_shift,
	ubsan_instrument_vla): Check bits in flag_sanitize_recover bitmask
	instead of flag_sanitize_recover as bool flag.

gcc/testsuite/
	* c-c++-common/ubsan/align-1.c: Update cmdline options.
	* c-c++-common/ubsan/align-3.c: Likewise.
	* c-c++-common/ubsan/bounds-1.c: Likewise.
	* c-c++-common/ubsan/div-by-zero-7.c: Likewise.
	* c-c++-common/ubsan/float-cast-overflow-10.c: Likewise.
	* c-c++-common/ubsan/float-cast-overflow-7.c: Likewise.
	* c-c++-common/ubsan/float-cast-overflow-8.c: Likewise.
	* c-c++-common/ubsan/float-cast-overflow-9.c: Likewise.
	* c-c++-common/ubsan/nonnull-2.c: Likewise.
	* c-c++-common/ubsan/nonnull-3.c: Likewise.
	* c-c++-common/ubsan/object-size-3.c: Likewise.
	* c-c++-common/ubsan/overflow-1.c: Likewise.
	* c-c++-common/ubsan/overflow-add-1.c: Likewise.
	* c-c++-common/ubsan/overflow-add-3.c: Likewise.
	* c-c++-common/ubsan/overflow-mul-1.c: Likewise.
	* c-c++-common/ubsan/overflow-mul-3.c: Likewise.
	* c-c++-common/ubsan/overflow-negate-2.c: Likewise.
	* c-c++-common/ubsan/overflow-sub-1.c: Likewise.
	* c-c++-common/ubsan/pr59503.c: Likewise.
	* c-c++-common/ubsan/pr60613-1.c: Likewise.
	* c-c++-common/ubsan/save-expr-1.c: Likewise.
	* c-c++-common/ubsan/shift-3.c: Likewise.
	* c-c++-common/ubsan/shift-6.c: Likewise.
	* c-c++-common/ubsan/undefined-1.c: Likewise.
	* c-c++-common/ubsan/vla-2.c: Likewise.
	* c-c++-common/ubsan/vla-3.c: Likewise.
	* c-c++-common/ubsan/vla-4.c: Likewise.
	* g++.dg/ubsan/cxx11-shift-1.C: Likewise.
	* g++.dg/ubsan/return-2.C: Likewise.
	* c-c++-common/ubsan/recovery-1.c: New test.
	* c-c++-common/ubsan/recovery-2.c: New test.
	* c-c++-common/ubsan/recovery-3.c: New test.
	* c-c++-common/ubsan/recovery-common.inc: New file.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@216552 138bc75d-0d04-0410-961f-82ee72b054a4
gcc/
	* recog.h (extract_constrain_insn): Declare.
	* recog.c (extract_constrain_insn): New function.
	* lra.c (check_rtl): Use it.
	* postreload.c (reload_cse_simplify_operands): Likewise.
	* reg-stack.c (check_asm_stack_operands): Likewise.
	(subst_asm_stack_regs): Likewise.
	* regcprop.c (copyprop_hardreg_forward_1): Likewise.
	* regrename.c (build_def_use): Likewise.
	* sel-sched.c (get_reg_class): Likewise.
	* config/arm/arm.c (note_invalid_constants): Likewise.
	* config/s390/predicates.md (execute_operation): Likewise.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@216553 138bc75d-0d04-0410-961f-82ee72b054a4
gcc/
	* doc/md.texi: Document "preferred_for_size" and "preferred_for_speed"
	attributes.
	* genattr.c (main): Handle "preferred_for_size" and
	"preferred_for_speed" in the same way as "enabled".
	* recog.h (bool_attr): New enum.
	(target_recog): Replace x_enabled_alternatives with x_bool_attr_masks.
	(get_preferred_alternatives, check_bool_attrs): Declare.
	* recog.c (have_bool_attr, get_bool_attr, get_bool_attr_mask_uncached)
	(get_bool_attr_mask, get_preferred_alternatives, check_bool_attrs):
	New functions.
	(get_enabled_alternatives): Use get_bool_attr_mask.
	* ira-costs.c (record_reg_classes): Use get_preferred_alternatives
	instead of recog_data.enabled_alternatives.
	* ira.c (ira_setup_alts): Likewise.
	* postreload.c (reload_cse_simplify_operands): Likewise.
	* config/i386/i386.c (ix86_legitimate_combined_insn): Likewise.
	* ira-lives.c (preferred_alternatives): New variable.
	(process_bb_node_lives): Set it.
	(check_and_make_def_conflict, make_early_clobber_and_input_conflicts)
	(single_reg_class, ira_implicitly_set_insn_hard_regs): Use it instead
	of recog_data.enabled_alternatives.
	* lra-int.h (lra_insn_recog_data): Replace enabled_alternatives
	to preferred_alternatives.
	* lra-constraints.c (process_alt_operands): Update accordingly.
	* lra.c (lra_set_insn_recog_data): Likewise.
	(lra_update_insn_recog_data): Assert check_bool_attrs.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@216554 138bc75d-0d04-0410-961f-82ee72b054a4
gcc/
	* recog.h (constrain_operands): Add an alternative_mask parameter.
	(constrain_operands_cached): Likewise.
	(get_preferred_alternatives): Declare new form.
	* recog.c (get_preferred_alternatives): New bb-taking instance.
	(constrain_operands): Take the set of available alternatives as
	a parameter.
	(check_asm_operands, insn_invalid_p, extract_constrain_insn)
	(extract_constrain_insn_cached): Update calls to constrain_operands.
	* caller-save.c (reg_save_code): Likewise.
	* ira.c (setup_prohibited_mode_move_regs): Likewise.
	* postreload-gcse.c (eliminate_partially_redundant_load): Likewise.
	* ree.c (combine_reaching_defs): Likewise.
	* reload.c (can_reload_into): Likewise.
	* reload1.c (reload, reload_as_needed, inc_for_reload): Likewise.
	(gen_reload_chain_without_interm_reg_p, emit_input_reload_insns)
	(emit_insn_if_valid_for_reload): Likewise.
	* reorg.c (fill_slots_from_thread): Likewise.
	* config/i386/i386.c (ix86_attr_length_address_default): Likewise.
	* config/pa/pa.c (pa_can_combine_p): Likewise.
	* config/rl78/rl78.c (insn_ok_now): Likewise.
	* config/sh/sh.md (define_peephole2): Likewise.
	* final.c (final_scan_insn): Update call to constrain_operands_cached.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@216555 138bc75d-0d04-0410-961f-82ee72b054a4
gcc/
	* recog.h (recog_data_d): Remove enabled_alternatives.
	* recog.c (extract_insn): Don't set it.
	* reload.c (find_reloads): Call get_enabled_alternatives.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@216556 138bc75d-0d04-0410-961f-82ee72b054a4
gcc/
	* lra.c (lra): Remove call to recog_init.
	* config/i386/i386.md (preferred_for_speed): New attribute
	(*float<SWI48:mode><MODEF:mode>2_sse): Override it instead of
	"enabled".  Remove check for sched1.

gcc/testsuite/
	* gcc.target/i386/conversion-2.c: New test.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@216557 138bc75d-0d04-0410-961f-82ee72b054a4