r600g/compute: Allow compute_memory_move_item to move items between resources

v2: Remove unnecesary variables

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
r600g/compute: Allow compute_memory_defrag to defragment between resources

This will be used in the following patch to avoid duplicated code

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
gallium: Add PIPE_CAP_COMPUTE_IMAGES_SUPPORTED

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
clover: Query the device to see if images are supported

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
r600g/compute: Fix singed/unsigned comparison compiler warnings.

The iteration variables go from 0 anyway.

Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
freedreno/a3xx/compiler: make IR heap dyanmic

The fixed size heap is a remnant of the fdre-a3xx assembler.  Yet it is
convenient for being able to free the entire data structure in one shot
without worrying about leaking nodes.

Change it to dynamically grow the heap size (adding chunks) as needed so
we don't have an artificial upper limit on shader size (other than hw
limits) and don't always have to allocate worst-case size.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
freedreno/a3xx: enable/disable wa's based on patch-level

It seems like for the most part, different behaviors, workarounds, etc,
should be conditional on GPU patch revision (ie. a320.0 vs a320.2)
rather than GPU id (a320 vs a330).

Signed-off-by: Rob Clark <robclark@freedesktop.org>
freedreno/a3xx/compiler: little cleanups

Remove some obsolete comments, rename deref->addr.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
freedreno/a3xx/compiler: scheduler vs pred reg

The scheduler also needs to be aware of predicate register (p0) in
addition to address register (a0).

Signed-off-by: Rob Clark <robclark@freedesktop.org>
freedreno/a3xx/compiler: rename ir3_shader to ir3

First step of reoganization split out compiler (so it can be shared
between a3xx and a4xx).  Rename ir3_shader -> ir3 (since we'll want
the name ir3_shader for a higher level object).

Signed-off-by: Rob Clark <robclark@freedesktop.org>
freedreno/ir3: split out shader compiler from a3xx

Move the bits we want to share between generations from fd3_program to
ir3_shader.  So overall structure is:

  fdN_shader_stateobj -> ir3_shader -> ir3_shader_variant -> ir3
                                    |- ...
                                    \- ir3_shader_variant -> ir3

So the ir3_shader becomes the topmost generation neutral object, which
manages the set of variants each of which generates, compiles, and
assembles it's own ir.

There is a bit of additional renaming to s/fd3_compiler/ir3_compiler/,
etc.

Keep the split between the gallium level stateobj and the shader helper
object because it might be a good idea to pre-compute some generation
specific register values (ie. anything that is independent of linking).

Signed-off-by: Rob Clark <robclark@freedesktop.org>
freedreno: fix typo in gpu version check

Opps, I should use larger fonts, I guess.

Reported-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Rob Clark <robclark@freedesktop.org>
r600g/compute: Try to use a temporary resource when growing the pool

Now, before moving everything to host memory, we try to create a
new resource to use as a pool. I we succeed we just use this resource
and delete the previous one. If we fail we fallback to using the
shadow.

This should make growing the pool faster, and we can also save
64KB of memory that were allocated for the 'shadow', even if they
weren't used.

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
r600g/compute: Defrag the pool at the same time as we grow it

This allows us two things: we now need less item copies when we have
to defrag+grow the pool (to just one copy per item) and, even in the
case where we don't need to defrag the pool, we reduce the data copied
to just the useful data that the items use.

Note: The fallback path is a bit ugly now, but hopefully we won't need
it much.

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
ilo: simplify ilo_flush()

Move fence creation to the new ilo_fence_create().
glsl: Allow non-constant UBO array indexing with GLSL4/ARB_gpu_shader5.

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
glsl: Mark entire UBO array active if indexed with non-constant.

Without doing a lot more work, we have no idea which indices may
be used at runtime, so just mark them all.

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
glsl: Convert uniform_block in lower_ubo_reference to ir_rvalue.

Previously this was a block index with special semantics for -1.
With ARB_gpu_shader5, this need not be a compile-time constant, so
allow any rvalue here and convert the -1 to a NULL pointer.

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
glsl: Accept nonconstant array references in lower_ubo_reference

Instead of falling back to just the block name (which we won't find),
look for the first element of the block array. We'll deal with the rest
in the backend by arranging for the blocks to be laid out contiguously.

V2: Squashed together patches 3, 5 of V1, plus a naming tweak.

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
glsl: No longer require ubo block index to be constant in ir_validate

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>