R600/SI: Fix verifier error with pseudo store instructions.

Use i32 instead of specifying SReg_32. When this is
the pseudo INDIRECT_BASE_ADDR, this would give a bogus
verifier error.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207770 91177308-0d34-0410-b5e6-96231b3b80d8
Fixing a cast-qual warning. getBufferStart() and getBufferEnd() both return a const char *, so casting to non-const was triggering a warning (even though the assignment and usage was always const anyway).

No functional changes intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207774 91177308-0d34-0410-b5e6-96231b3b80d8
PR19623: Implement typedefs of void.

This the LLVM portion that will allow Clang and other frontends to emit
typedefs of void by providing a null type for the typedef's underlying
type.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207777 91177308-0d34-0410-b5e6-96231b3b80d8
DebugInfo: Correct the attribute type kind.

Post commit review feedback from Paul Robinson regarding r207777.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207782 91177308-0d34-0410-b5e6-96231b3b80d8
Add an optimization that does CSE in a group of similar GEPs.

This optimization merges the common part of a group of GEPs, so we can compute
each pointer address by adding a simple offset to the common part.

The optimization is currently only enabled for the NVPTX backend, where it has
a large payoff on some benchmarks.

Review: http://reviews.llvm.org/D3462

Patch by Jingyue Wu.




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207783 91177308-0d34-0410-b5e6-96231b3b80d8
Update and sort CMakeLists.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207785 91177308-0d34-0410-b5e6-96231b3b80d8
Don't propagate StorageClass and ComplexType to aliases.

This matches gas' behaviour on COFF.

I think that this yak is now sufficiently shaved for aliases with offset
to work.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207786 91177308-0d34-0410-b5e6-96231b3b80d8
Fix uninitialized variable introduced in r207739.

This was initialized by llvm-mc (calling setDwarfVersion) but other
clients (such as clang, llc, etc) aren't necessarily initializing this
so we were getting garbage DWARF version values in the output.
Initialize it to a reasonable default (the same default used in llvm-mc,
though this is higher than it was (2) previously).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207788 91177308-0d34-0410-b5e6-96231b3b80d8
Add basic functionality for assignment of ints.
This creates a lot of core infrastructure in which to add, with little
effort, quite a bit more to mips fast-isel

Test Plan: simplestore.ll

Reviewers: dsanders

Reviewed By: dsanders

Differential Revision: http://reviews.llvm.org/D3527

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207790 91177308-0d34-0410-b5e6-96231b3b80d8
[OCaml] Add an ocamlfind package llvm.all_backends.

This package is useful for architecture-independent tools like llc.

Patch by Jacques-Pascal Deplaix.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207793 91177308-0d34-0410-b5e6-96231b3b80d8
Remove HexagonTargetMachine::addPassesForOptimizations; it is not needed any more.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207800 91177308-0d34-0410-b5e6-96231b3b80d8
[IR] Make {extract,insert}element accept an index of any integer type.

Given the following C code llvm currently generates suboptimal code for
x86-64:

__m128 bss4( const __m128 *ptr, size_t i, size_t j )
{
    float f = ptr[i][j];
    return (__m128) { f, f, f, f };
}

=================================================

define <4 x float> @_Z4bss4PKDv4_fmm(<4 x float>* nocapture readonly %ptr, i64 %i, i64 %j) #0 {
  %a1 = getelementptr inbounds <4 x float>* %ptr, i64 %i
  %a2 = load <4 x float>* %a1, align 16, !tbaa !1
  %a3 = trunc i64 %j to i32
  %a4 = extractelement <4 x float> %a2, i32 %a3
  %a5 = insertelement <4 x float> undef, float %a4, i32 0
  %a6 = insertelement <4 x float> %a5, float %a4, i32 1
  %a7 = insertelement <4 x float> %a6, float %a4, i32 2
  %a8 = insertelement <4 x float> %a7, float %a4, i32 3
  ret <4 x float> %a8
}

=================================================

        shlq    $4, %rsi
        addq    %rdi, %rsi
        movslq  %edx, %rax
        vbroadcastss    (%rsi,%rax,4), %xmm0
        retq

=================================================

The movslq is uneeded, but is present because of the trunc to i32 and then
sext back to i64 that the backend adds for vbroadcastss.

We can't remove it because it changes the meaning. The IR that clang
generates is already suboptimal. What clang really should emit is:

  %a4 = extractelement <4 x float> %a2, i64 %j

This patch makes that legal. A separate patch will teach clang to do it.

Differential Revision: http://reviews.llvm.org/D3519

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207801 91177308-0d34-0410-b5e6-96231b3b80d8
[Stackmaps] Replace the custom ConstantPool class with a MapVector.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207803 91177308-0d34-0410-b5e6-96231b3b80d8
[Stackmaps] Refactor serialization code. No functional change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207804 91177308-0d34-0410-b5e6-96231b3b80d8
[Stackmaps] Add command line option to specify the stackmap version.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207805 91177308-0d34-0410-b5e6-96231b3b80d8
[Stackmaps] Pacify windows buildbot.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207807 91177308-0d34-0410-b5e6-96231b3b80d8
Fold strlen(expr ? "str1" : "str2") to x ? len1 : len2. This fires about 330 times in a bootstrap of clang.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207828 91177308-0d34-0410-b5e6-96231b3b80d8
Code style fix from Duncan P. N. Exon Smith.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207831 91177308-0d34-0410-b5e6-96231b3b80d8
Allow SelectionDAG::FoldConstantArithmetic to work when it's called with a vector VT but scalar values.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207835 91177308-0d34-0410-b5e6-96231b3b80d8
AArch64/ARM64: support indexed loads/stores on vector types.

While post-indexed LD1/ST1 instructions do exist for vector loads,
this patch makes use of the more flexible addressing-modes in LDR/STR
instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207838 91177308-0d34-0410-b5e6-96231b3b80d8