tcg: Disable tcg_exit_req test if singlestep

When single-stepping, we'll exit the loop after every insn anyway.
Disabling the test prevents a "race condition" with "-d cpu" wherein
we dump the cpu state, enter the tb, recognize the exit request, and
make no progress.

This results in "double dumps" of the cpu state, which makes it more
difficult than necessary to compare dumps to find compilation errors.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-mips: Layout executable and code_gen_buffer

Choosing good addresses for them means we can use JAL for helper calls.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-mips: Constrain the code_gen_buffer to be within one 256mb segment

This assures us use of J for exit_tb and goto_tb, and JAL for calling
into the generated bswap helpers.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-mips: Use J and JAL opcodes

For userland builds calls will normally be in range,
and for the exit_tb opcode the branch to the epilogue.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-mips: Fill the exit_tb delay slot

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-mips: Split large ldst offsets

Use this to reduce goto_tb by one insn.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-mips: Move softmmu slow path out of line

At the same time, tidy up the call helpers, avoiding a memory reference.
Split out several subroutines.  Use TCGMemOp constants.  Make endianness
selectable at runtime.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-mips: Convert to new qemu_l/st helpers

In addition, fill delay slots calling the helpers and tail
call to the store helpers.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-mips: Convert to new_ldst

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-mips: Rearrange register allocation

Use FP (also known as S8) as a normal call-saved register.

Include T0 in the allocation order and call-clobbered list
even though it's currently used as a TCG temporary.

Put the argument registers at the end of the allocation order.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-mips: Introduce TCG_TMP0, TCG_TMP1

Use these instead of hard-coding the registers to use for temporaries.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-mips: Use T9 for TCG_TMP1

T0 is an argument register for the n32 and n64 abis.  T9 is the call
address register for the abis, and is more directly under the control
of the backend.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-mips: Use EXT for AND on mips32r2

At the same time, tidy deposit by introducing tcg_out_opc_bf.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-mips: Name the opcode enumeration

And use it in the opcode emission functions.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-mips: Fix subtract immediate range

Since we must use ADDUI, we would generate incorrect code for -32768.
Leaving off subtract of +32768 makes things easier for a follow-on patch.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-mips: Hoist args loads

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-mips: Improve add2/sub2

Reduce insn count from 5 to either 3 or 4.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-mips: Commonize opcode implementations

Most opcodes fall in to one of a couple of patterns.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-mips: Simplify setcond

Use a table to fold comparisons to less-than.
Also, move the function up in the file for futher simplifications.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-mips: Simplify brcond

Use the same table to fold comparisons as with setcond.

Signed-off-by: Richard Henderson <rth@twiddle.net>