clk: composite: support determine_rate using rate_ops->round_rate + mux_ops->set_parent

In case the rate_hw does not implement determine_rate, but only round_rate
we fallback to best_parent selection if mux_hw is present and support
reparenting.

Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com>
clk-pll: we only need clk-provider.h not clk-private.h
pinctrl-rockchip: convert output back to debug again
clk: rockchip: add composite type
clk: rk3188: convert some initial clocks to composite type
add nomux-composite for single-parent divider-gate combinations
and convert saradc to it
clk: composite: allow read-only clocks

This allows readl-only composite clocks by making mux_ops->set_parent and
divider_ops->round_rate/set_rate optional.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
merge divs and muxes into the composite-clock definition
and rename everything to "branch"
convert rk3188 clocks to new scheme
finish restructuring clocks
init correct clock for mac
Merge commit 'refs/top-bases/topgit/rk3288' into topgit/rk3288
Revert "add comment to the previous commit referencing the previous upstream try"

This reverts commit bd6acd0a043ad09a537e271651d4c6cb54ab0d7c.
Revert "ARM: decompressor: Flush tlb before swiching domain 0 to client mode"

This reverts commit 0c9381bbae8655b0246714cafb64d8ce3612e07c.

Fixed in bootloader.
enable ARM_ARCH_TIMER
more rk3288 clock definitions according to new scheme
clk-composite: actually return the best rate and not the best diff
use the grf syscon regmap to handle the pll lock status
remove second mapping
override the dummy150 for the timers with the actual cru clock