mmc: card: change long_sequential_test time measurements to ktime

Change time measurements in long_sequential_test from jiffies to ktime,
and make the relevant change in test-iosched infrastructure.

In long_sequential_test we measure throughput, and the jiffies resolution
is not sensitive enough for this calculation.

Change-Id: If7c9a03c687f61996609c014e056bcd7132b9012
Signed-off-by: Lee Susman <lsusman@codeaurora.org>
mmc: core: disable runtime PM for sdio cards

This patch disables runtime PM for sdio cards because
the runtime PM is managed by the respective SDIO function
drivers.
The card device (if sdio card) is set as runtime active
however, the runtime PM is not enabled for the same.
The runtime PM framework ensures that a device's
parents' cannot be suspended till all of its children
are suspended.

Change-Id: Ie0778d96f91738fc14a0dc05a3430c1f382ef13c
Signed-off-by: Asutosh Das <asutoshd@codeaurora.org>
mmc: sdhci-msm: configure regulators only if defined in dts

This patch adds support to configure regulators only if
it is defined in dts files. However, it doesn't return an
error otherwise.

Change-Id: Iac2284b2df3b3d8af623da0f17697694994b34b8
Signed-off-by: Asutosh Das <asutoshd@codeaurora.org>
mmc: card: update long_sequential_write_test queue depth

Since some systems have higher memory pressure, we limit the amount of
simultaneous test requests. The former limitation was 118, due to the
request queue size, but now we further restrict this number to half.

Change-Id: I893b9ad1b133c922f90497b0ec1f416514529fb8
CRs-fixed: 510814
Signed-off-by: Lee Susman <lsusman@codeaurora.org>
mmc: core: Disable HPI for certain Hynix eMMC cards

Certain Hynix eMMC 4.41 cards might get broken when HPI feature is used
and hence this patch disables the HPI feature for such buggy cards.

As some of the other features like BKOPs/Cache/Sanitize are dependent on
HPI feature, those features would also get disabled if HPI is disabled.

Change-Id: I6a638ce089cbd977122e47aecb721bc3f0adf7b0
Signed-off-by: Pratibhasagar V <pratibha@codeaurora.org>
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
mmc: block: fix the block driver shutdown

mmc_queue_suspend() function returns the -EBUSY error if the MMC request
queue is not empty as this function was getting called from the system
suspend path which enforces time limit on the completion of the driver
suspend callback.

But recently the driver shutdown routine also started using
mmc_queue_suspend() function but in shutdown case, we would really want
to wait for the MMC request queue to be empty.

To fix above issue, this change have added new argument named "wait" to
mmc_queue_suspend() function which would tell whether it needs to wait
for the MMC request queue to be empty or not. Driver shutdown callback
will tell the mmc_queue_suspend() to wait but suspend callback won't.

CRs-Fixed: 503227
Change-Id: I86f32d68ec4c4799648785681c5776f090ea6e36
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
mmc: print an error on FLUSH timeout

Up until now the FLUSH timeout error was not printed and there
was no way to know if the FLUSH completed successfully or not.
Printing the FLUSH failure will help to identify if FS corruption
happened due to this timeout.

Change-Id: Ibbb51d030d7130d63974a1b4319ad4a24621c595
Signed-off-by: Maya Erez <merez@codeaurora.org>
Signed-off-by: Konstantin Dorfman <kdorfman@codeaurora.org>
mmc: block: flush request requeue after timeout.

On some eMMC cards cache flush is taking longer than 30 sec timeout
after HPI issued and -EIO reported to the upper layers. This may result
into journaling issues as flush calls are issued by the file system
joulrnaling code.

This change increases flash cache timeout to 90 sec, in case of timeout
occurs, after HPI issued, flash request re-queued to the block layer queue
to execute it later and keep journaling logic valid.

Conflicts:
	drivers/mmc/card/block.c

Change-Id: I1e968c07056062fd9c8e14e5bc3e62b3b4b99c64
Signed-off-by: Panwar Vivek <vpanwa@codeaurora.org>

Conflicts:

	drivers/mmc/card/block.c

Signed-off-by: Maya Erez <merez@codeaurora.org>
mmc: core: increase timeout for disable cache operation

According to eMMC specification, there is no upper bound defined on
a flush request and the duration of flush operation is left to card
vendor's implementation. This means that it may take a very long
time to complete.

When eMMC cache is disabled, the card has to flush all the data in its
cache. So this means that for certain cards, the driver is not waiting
long enough for the flush to complete during cache disable operation,
leading to data on the card being corrupted.

This change increases the timeout for cache disable operation, thus
preventing data corruption.

CRs-Fixed: 562350
Change-Id: If68328ab56b50c7596800f07ef92c0ab16a55ec0
Signed-off-by: Maya Erez <merez@codeaurora.org>
Signed-off-by: David Ng <dave@codeaurora.org>
Signed-off-by: Krishna Konda <kkonda@codeaurora.org>
mmc: core: skip stop flow when current request already done

When mmc_stop_request() has no request to stop, because underlying
host driver reported this, the flow should wait for the mmc done()
callback marking that urgent still pending.

Change-Id: Iacc95591ee76a965916af05a31a67dd8997c233e
CRs-Fixed: 538117
Signed-off-by: Konstantin Dorfman <kdorfman@codeaurora.org>
ARM: dts: msm: Reduce the clocks for SD card slot for MSM8226

The SD cards functionality on QRD devices are failing
with CRC errors when used with higher clock / bus modes.

So reduce the clock speed for SD card slot.

CRs-Fixed:  491789
Change-Id: I24b8bfe44cee4367c22846747f439365d8795d2e
Signed-off-by: Pratibhasagar V <pratibha@codeaurora.org>
mmc: msm_sdcc: Vote for MSM bus clocks before enabling iface_clk

The current driver just enables "iface_clk" before accessing its
registers but MSM bus clocks are also required for register access
without which any register access would result in chip reset.

The MSM bus clocks can be enabled by setting vote to MSM bus bandwidth
driver. Currently, voting is being done in msmsdcc_enable/disable but these
functions will not be invoked by MMC core layer for some cases such
as mmc_power_up/mmc_power_off, which require peripheral register
access.

To resolve the above mentioned problem, bus voting and de-voting will
now be done as part of clocks management within the MSM SDCC driver.

Change-Id: I4ac514e7348a53ed2816eb4114aa17eba9cedf01
Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
mmc: msm_sdcc: fix pwrsave bit handling

SDCC controller provides the PWRSAVE control bit to automatically
disable the clock to card when there is no activity with card.
SDCC driver provides the compile time option to disable this pwrsave
feature completely but some of the recent driver changes ignore this
and may enable the pwrsave feature even when its not required. This
change ensures that we always check if the pwrsave is allowed or not
before really enabling it.

CRs-Fixed: 490017
Change-Id: Ica764565745ea0b54300e38157c58c0aa643291d
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
mmc: msm_sdcc: disable sdhci mode during probe

Now that bootloaders support sdhci mode, its possible for them
to leave the sdcc core in sdhci mode after loading the kernel
in ram and pass control to Linux for bootup. In that case if
sdcc driver was enabled, the core wont function as expected
since it happens to be in sdhci mode.

So for sdcc cores that support sdhci mode, disable SDHCi mode
before initializing the sdcc core during probe.

Change-Id: Ib9dfa7dd96d3c67979b51ea39dc4810cd44e5fd3
Signed-off-by: Krishna Konda <kkonda@codeaurora.org>
mmc: sdhci-msm: fix pwrsave bit handling

SDCC controller provides the PWRSAVE control bit to automatically
disable the clock to card when there is no activity with card.
During the SDCC DLL tuning, PWRSAVE is disabled to make sure that clock
is always running but once the DLL tuning is completed, currently we
enable the PWRSAVE unconditionally irrespective of its previous state.

This change ensures that we always check if the previous state of pwrsave
before really enabling it.

Change-Id: I464ab1e0db41af50550bb5a9ea9b909ee0d27dd9
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
sdhci: sdhci_stop_request() returns error when no request

There is race between sdhci_tasklet_finish()
and sdhci_stop_request(): when the request is finished before
stop flow called, error returned.

Change-Id: Ic036feae925b2e9e5435e44f97b24a179547bf49
Signed-off-by: Konstantin Dorfman <kdorfman@codeaurora.org>
mmc: core: Refactor bus speed selection code

The bus speed selection code in mmc_card_init() is convoluted, refactor
the code to simplify this and make it simpler for adding new bus speed
capabilities.

Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
mmc: core: Add support for HS400

HS400 is a new bus speed mode introduced in eMMC5.0 specification. This
patch adds the capability in mmc core to switch to HS400 mode when both
the host and the card supports it.

Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
mmc: sdhci-msm: Add HS400 platform support

The following msm platform specific changes are added to support HS400.
- Enable CDC calibration fixed feedback and sleep clock.
- Allow tuning for HS400 mode.
- Add capability to parse and configure pull settings for RCLK pin.
- Configure HS400 timing mode using the VENDOR_SPECIFIC_FUNC register.

Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
mmc: sdhci-msm: Add calibration tuning for CDCLP533 circuit

In HS400 mode a new RCLK is introduced on the interface for read data
transfers. The eMMC5.0 device transmits the read data to the host with
respect to rising and falling edges of RCLK. In order to ensure correct
operation of read data transfers in HS400 mode, the incoming RX data
needs to be sampled by delayed version of RCLK.

The CDCLP533 delay circuit shifts the RCLK by T/4. It needs to be
initialized, configured and enabled once during HS400 mode switch and
when operational voltage/clock is changed.

Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>