drivers/iio/adc/ad9361: Fix MAX/MIN ADC Rate and DAC=ADC/2 clock handling.

Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
drivers/iio/adc/ad9361: Refine previous fix

Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
iio:cf_axi_dds_so: Restore ctrl register after frequency change

Restore the original setting of the ctrl register after a frequency change. This
fixes a bug where the core would stay off after a frequemcy change.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
drivers/iio/adc/ad9361: Revise EXT LO handling

Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
include/linux/iio/frequency/adf4350: Fix typo

Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Merge branch 'xcomm_zynq_new_pcore_regmap' of https://github.com/analogdevicesinc/linux into xcomm_zynq_new_pcore_regmap
drivers/iio/adc/ad9361: ext_lo_control - add ability to re-enable

Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
drivers/iio/frequency/cf_axi_dds: Use enable flag in rate change notifier cb

Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
drivers/iio/adc/ad9361: Temp should read in milli degrees

Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
drivers/iio/frequency/adf4350: Sync all registers after power down

This allows proper operation in case of frequency updates during power down

Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
arch/arm/boot/dts/zynq-zed-adv7511: In the FPGA design, the hdmi_clock is connected now to "clkc 16".
arch/arm/boot/dts/zynq-zc702-adv7511: In the FPGA design, the hdmi_clock is connected now to "clkc 16".
arch/arm/boot/dts/zynq-zc706-adv7511: In the FPGA design, the hdmi_clock is connected now to "clkc 16".
arch/arm/boot/dts/zynq-zc706-adv7511: In the FPGA design, the hdmi_clock is connected now to "clkc 16".
arch/arm/boot/dts/zynq-zc702-adv7511: In the FPGA design, the hdmi_clock is connected now to "clkc 16".
arch/arm/boot/dts/zynq-zed-adv7511: In the FPGA design, the hdmi_clock is connected now to "clkc 16".
drivers/iio/frequency/ad9523: Misc changes

1) Add support for PLL2 only modes
2) In case powerdown, reset and sync gpios are provided
   - request and set defaults
3) Initially Sync dividers
4) SPI SDO active also use spi3wire pdata flag.
5) Avoid surplus devm_kzalloc.

Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
drivers/iio/adc/ad9361: Use proper define - and disable 2nd channels

Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
iio: dmabuf: Fix typo

s/incomming/incoming/g

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
iio: dmabuf: Use list_add_tail() instead of list_move_tail() in iio_dma_buffer_enqueue()

The block is not enqueued in any list at this point, using list_move_tail() will fail in this case.