guest-tools: out-of-tree build

Signed-off-by: Vitaly Chipounov <vitaly.chipounov@epfl.ch>
Makefile: bunch of fixes

- dependency fixes for parallel builds
- clang only built for llvm-native
- guest tools built for multiple archs
- stp built with -j1

Signed-off-by: Vitaly Chipounov <vitaly.chipounov@epfl.ch>
Makefile: option to use an external LLVM build

Signed-off-by: Vitaly Chipounov <vitaly.chipounov@epfl.ch>
hw/pci.c: per-state enable/disable PCI devices

When a device is disabled, its config space does not respond.

Signed-off-by: Vitaly Chipounov <vitaly.chipounov@epfl.ch>
hw/pci.c: save bitmaps in the snapshot

This prepares for per-state configuration data.
Vanilla QEMU sets the config on boot. This change will
allow to modify it at run-time while making changes
state-local.

Signed-off-by: Vitaly Chipounov <vitaly.chipounov@epfl.ch>
hw/pci.c: fixed notification when MMIO mappings change

Signed-off-by: Vitaly Chipounov <vitaly.chipounov@epfl.ch>
hw/pci.c: allow per-state dynamic BAR reconfiguration

Signed-off-by: Vitaly Chipounov <vitaly.chipounov@epfl.ch>
Add S2E core support for ARM

Patched ARM-target with S2E calls, currently supports integrator
and versatile boards for ARM.
Add build directory with Makefile
Add sample config.lua
Tweaks
Undefined symbol fix
Guest: added s2earm.h
Guest ARM: force buffers and strings to be paged in
Fixed missing s2e_translate_block_end hook (patch from Jonas Zaddach)
Fix bit test in Exynos4210 UART emulation to use & instead of &&

Fix bit test in Exynos4210 UART emulation to use & instead of &&

* hw/exynos4210_uart.c: s/&&/&/

Signed-off-by: Daniel P. Berrange <berrange@redhat.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
ARM: Make target_phys_addr_t 64 bits and physaddrs 40 bits

Make target_phys_addr_t 64 bits for ARM targets, and set
TARGET_PHYS_ADDR_SPACE_BITS to 40.  This should have no effect for ARM
boards where physical addresses really are 32 bits (except perhaps a
slight performance hit on 32 bit hosts for system emulation) but allows
us to implement the Large Physical Address Extensions for Cortex-A15,
which mean 40 bit physical addresses.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
hw/a9mpcore: Fix compilation failure if physaddrs are 64 bit

Add a cast to a logging printf to avoid a compilation failure
if target_phys_addr_t is a 64 bit type. (This is better than
using TARGET_FMT_plx because we really don't need a full
16 digit hex string to print the offset into a device.)

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Eric Blake <eblake@redhat.com>
hw/cadence_gem: Make rx_desc_addr and tx_desc_addr uint32_t

Make the state fields rx_desc_addr and tx_desc_addr uint32_t;
this matches the VMStateDescription, and also conforms to how
hardware works: the registers don't magically become larger
if the device is attached to a CPU with a larger physical
address size. It also fixes a compile failure if the
target_phys_addr_t type is changed to 64 bits.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com>
target-arm: Use target_phys_addr_t in get_phys_addr()

In the implementation of get_phys_addr(), consistently use
target_phys_addr_t to hold the physical address rather than
uint32_t.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>