ARM: tegra: misc cleanups triggered by Tegra124 review

Use a named constant for the PLL lock bit in enable_cpu_clocks().

Construct the complete value of pmc_pwrgate_toggle, rather than doing a
read-modify-write; the register is simple enough and doesn't need to
maintain state between operations.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
ARM: tegra: enable PLLX only once it's been fully configured

This programming sequence is correct per Jimmy Zhang, and makes sense
too!

Signed-off-by: Stephen Warren <swarren@nvidia.com>
ARM: tegra: remove a conditional for CSITE rate

There's already an SoC-specific conditional in cpu.h to determine the
PLLP rate. Define the CSITE clock rate inside the same conditional, so
that we can remove a conditional from clock_enable_coresight(). This
means one less place to update the code for new SoCs.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
ARM: tegra: add/edit headers for Tegra124

These headers define the Tegra124 hardware. Add them to the usual
place.

Add Tegra124 chip ID/SKU ID definitions to common headers.

There's no real HW change on Tegra124 for 90% of the toys, so it might
make sense for a future patch to unify some of the content of these
files in a common location.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
---
v2:
* Put content directly into files in arch-tegra124/; don't put files there
  that simply include the real files in arch-tegra/.
* Removed unused emc.h, fuse.h.
* Added to arch-tegra/pmc.h rather than creating a new arch-tegra124/pmc.h,
  since some code already includes arch-tegra/pmc.h, and I didn't feel good
  about different code getting different versions of pmc.h.
* Remove error-inducing prototype for board_usb_init().
* Squashed in the other patch which edited arch-tegra/*.h, since they're
  both just adding/editing header files.
* Don't touch Tegra114 SPI header.
* Minor whitespace cleanup.
ARM: tegra: add SPL/AVP (arm720t) CPU files for Tegra124

This provides SPL support for Tegra124 boards - AVP early init, plus
CPU (A15) init/jump to main U-Boot.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
---
v2:
* Convert to Kconfig-style make Makefiles.
* Update AVP/PLLP clock programming to match Tegra114.
* Extracted changes to PLLX programming order into a separate patch.
* Use PLL_LOCK_MASK constant instead of a hard-coded value.
* No need to read-modify-write pmc_pwrgate_toggle or
  crc_clk_cpu_cmplx_clr.
* s/1x4/Tegra124/
* don't mangle (c) header in cpu.c.
* Remove leading space from debug() messages.
* Fix comment re: CPUPWRGOOD_TIMER
* Various code formatting fixes and redundant bracket and comment
  removal.
ARM: tegra: Add CPU (armv7) files for Tegra124

These files are for code that runs on the CPU (A15) on Tegra124 boards.
At this time, there is no A15-specific code here. The warmboot/LP0 files
aren't included as that code hasn't been ported yet.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
---
v2:
* Convert to Kconfig-style make Makefiles
* s/MASK_BITS_29_28/MASK_BITS_31_28/ to match earlier renaming patch
* Update AVP/PLLP clock programming to match Tegra114
ARM: tegra: add common (shared) CPU files

These files are used by both SPL and main U-Boot.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
ARM: tegra: Add generic Tegra124 build support

Basic Tegra124 build support added - no specific board is targeted.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
ARM: tegra: add DT files for Tegra124 and Venice2

These are fairly complete, and near-clones of Tegra114 Venice, with an
additional I2C port, and MMC address changes for Tegra124.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
ARM: tegra: add Venice2 (Tegra124) board

These are the board files for Venice2 (Tegra124), plus the AS3722 PMIC
files. PMIC init will be moved to pmic_common_init later.

This builds/boots on Venice2, SPI/MMC/USB/I2C all work. Audio, display
and WB/LP0 are not supported yet.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
---
v2:
* Convert to Kconfig-style make Makefiles
* Fix boards.cfg sort order
* Remove most functional diffs (i.e. other than SoC name, valid values,
  etc.) between include/configs/tegra1[12]4-common.h
ARM: tegra: fix "bootp" issue for Tegra124 too

Fix the timeout issue after running "bootp" command in U-Boot console.

TXFIFOTHRES bits of TXFILLTUNING register should be set to 0x10 after a
controller reset and before RUN bit is se, (per technical reference
manual.

Signed-off-by: Jim Lin <jilin@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
ARM: tegra: fix Tegra124 SKU detection, and allow any SKU

Signed-off-by: Stephen Warren <swarren@nvidia.com>
ARM: tegra: enable bootcmd_pxe for Tegra124

FIXME: Squash this into the relevant Tegra124 patch?

Signed-off-by: Stephen Warren <swarren@nvidia.com>