sched: fix race between try_to_wake_up() and move_task()

Until a task's state has been seen as interruptible/uninterruptible
and it is no longer on_cpu, it is possible that the task may move
to another CPU (load balancing may cause this). Here is an example
where the race condition results in incorrect operation:

- cpu 0 calls put_prev_task on task A, task A's state is TASK_RUNNING
- cpu 0 runs task B, which attempts to wake up A
- cpu 0 begins try_to_wake_up(), recording src_cpu for task A as cpu 0
- cpu 1 then pulls task A (perhaps due to idle balance)
- cpu 1 runs task A, which then sleeps, becoming INTERRUPTIBLE
- cpu 0 continues in try_to_wake_up(), thinking task A's previous
  cpu is 0, where it is actually 1
- if select_task_rq returns cpu 0, task A will be woken up on cpu 0
  without properly updating its cpu to 0 in set_task_cpu()

CRs-Fixed: 665958
Change-Id: Icee004cb320bd8edfc772d9f74e670a9d4978a99
Signed-off-by: Steve Muckle <smuckle@codeaurora.org>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>
kernel: rng: Add IOCTL support to disable bus bandwidth

QRNG bus scale is set to high before qrng_read & set to
low after qrng_read, this impacts the performance during
boot-up, as there are various clients using qrng during
bootup. Inorder to fix this problem, a daemon is introduced
which calls into kernel module (that sets low bandwidth).
This change supports the IOCTL call to disable the bus bandwidth.

Change-Id: I386d1eb4c50c057ae2852e7f9d47c8db8e522ca5
Signed-off-by: Hariprasad Dhalinarasimha <hnamgund@codeaurora.org>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>
crypto: msm: Add support for FIPS complience

FIPS140-2 certification asks to do a Power on Known Answer tests on each
algorithm which is getting certified. This patch implements the self tests
and hardcoded test vectors.  Also, we need to verify the integrity of
kernel as soon as it boots up. This patch also adds an ioctl for
integrity test along with ioctl to query FIPS status (pass / fail) from
user land.
also, The piece of code is added for FIPS compliance DRBG under
drivers/char/hw_random
This change is already merged to KK mainline.

Change-Id: I7f3355602d5c2dfaefce0c0e4f9225fde0c5f485
Signed-off-by: Dinesh K Garg <dineshg@codeaurora.org>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>
crypto: msm: Compilation flag in  Kconfig For FIPS

Added a FIPS_ENABLE flag under drivers/crypto/Kconfig
which will be enabled/disabled according to defconfig
file selection of CONFIG_FIPS_ENABLE
This change is already merged to KK mainline.

Change-Id: I8d2c1278598e255027e4427483ed9d4e684b2839
Signed-off-by: Dinesh K Garg <dineshg@codeaurora.org>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>
net: socket: Added notifier chains for socket administrative functions

Allows other areas in the kernel to register notifier callbacks which
get invoked whenever something performs an administrative action on a
socket. This patch adds hooks in socket(), bind(), listen(), accept(),
shutdown().

CRs-Fixed:  626021
Change-Id: I4ae99cb2206d7c4eddba69757335c18d10143045
Signed-off-by: Harout Hedeshian <harouth@codeaurora.org>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>
net: sockev: Initial Commit

Added module which subscribes to socket notifier events. Notifier events
are then converted to a multicast netlink message for user space
applications to consume.

CRs-Fixed:  626021
Change-Id: Id5c6808d972b69f5f065d7fba9094e75c6ad0b2c
Signed-off-by: Harout Hedeshian <harouth@codeaurora.org>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>
spi_qsd: Add vote for clock path

Currently the spi driver votes for its core clock. However, it is
possible that the core-clock's source will be off. When the source
is off, the spi core is not clocked. This patch adds voting for
the entire clock path, thus guarantee clocking to the spi core.
Voting for the path cost a few msecs. A client may choose when
to pay this overhead. By default the votes takes place in the
runtime-pm callbacks which tie to transaction requests. A client
may choose to invoke these callbacks itself whenever it likes
by directly calling the driver's runtime-pm. A third option is
to set the active_only flag in platform data which results in the
callbacks being called when the application processor power state
changes.

CRs-Fixed: 478465
Change-Id: Ib866399c0e84a875a19a0d1506d77bbe77d5fe61
Signed-off-by: Gilad Avidov <gavidov@codeaurora.org>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>
spi_qsd: Correction in DMA mode check

Due to a bug in the if() condition msm_spi_use_dma
function is always returning '0' when cs_change
is true. Due to this issue the DMA mode is not being used
when it has to be.

CRs-Fixed: 475841
Change-Id: I7da2ee091635f0cfd89058787c35b62adf1984b5
Signed-off-by: Kiran Gunda <kgunda@codeaurora.org>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>
spi_qsd: Config GPIOs by name rather then by index

Currently GPIOs are identified (MISO/MOSI/CLK or CS0..3)
by their index in the device-tree entry's array.
Further, chipselect GPIOs must be declared in order.
This allows to set a value for GPIO number three only
if the values for GPIOs one and two are also set.
This patch allows the driver to identify GPIOs by a
unique name, thus allows to specify any arbitrary
chipselect GPIO and reduces chances of simple
user configuration error.

Change-Id: I7cf1fb4329155bd5fc635257fc58d1dfa7312462
Signed-off-by: Gilad Avidov <gavidov@codeaurora.org>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>
spi_qsd: Add support for bam pipe flush on timeout

BAM pipes must be flushed when a transfer timeout
leaving dangling descriptors.

Change-Id: I29fbd2a98964bff5496630a165b3cd0a3f1f2d08
Signed-off-by: Gilad Avidov <gavidov@codeaurora.org>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>
spi_qsd: Verify pointers prior to redirection

Redirection on a NULL pointer leads to a system crash.
Here we verify pointers which potentially may be NULL
before a redirection.

Change-Id: I72b856e52f63b13e517c28d8dbb04e1f333f8065
Signed-off-by: Gilad Avidov <gavidov@codeaurora.org>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>
spi_qsd: Correct an error reporting check

When reading values from the device tree, the error
check on BAM producer pipe must be negated.

Change-Id: Ia766cabdde47390c5a3c79b1c98a704e695fc571
Signed-off-by: Gilad Avidov <gavidov@codeaurora.org>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>
spi_qsd: correct the chip select gpios valid field entry

During probe Chip select gpio's valid field is set to non-zero.
This is causing gpio free to get called for not-used gpios
during runtime suspend.

CRs-Fixed: 525743
Change-Id: Ib0de417d640f30908ad11650b584833dac286646
Signed-off-by: Alok Chauhan <alokc@codeaurora.org>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>
spi_qsd: Remove redundant input first setting in bam mode

The HW is not mandating the use of input first in bam mode,
therefore, that statement is removed.

CRs-Fixed: 519665
Change-Id: I7c5bbe8a71ea5b8a0e25efdea585251c7c4d4d14
Signed-off-by: Gilad Avidov <gavidov@codeaurora.org>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>
spi_qsd: Remove check for unaligned  length during input_irq

QUP_IRQ complete is triggered before dmov_rx callback.
Which will initiate SPI to start next transfer, due to
this earlier DMOV_CMD is blocked and results in kernel panic.

Current Implementation  make sure that transfer complete waits
For DMOV callback only in case of aligned lengths ,This patch
ensures transfer trigger only after DMOV RX call back for
unaligned length also.

CRs-Fixed: 583126
Change-Id: I306a705d0eaf0eac33b2dbf335992254351cce20
Signed-off-by: Sana Venkat Raju <c_vsana@codeaurora.org>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>
spi_qsd: Add support for multiple BAM descriptors

Currently SPI driver is queuing a single BAM descriptor
at a time. The BAM engine supports queuing of multiple
transfer descriptors.

Add support to spi driver to queue multiple descriptors.

CRs-Fixed: 546346
Change-Id: Iaee9b3b362832262b75e46e19ad18552d037620b
Signed-off-by: Alok Chauhan <alokc@codeaurora.org>
Signed-off-by: Sana Venkat Raju <c_vsana@codeaurora.org>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>
spi_qsd: Fix SPI L2 Crash

Message queue  is scheduled to process
SPI messages during system suspend
state which leads to crash.

This patch make sure all the messages
in queue are processed before system
suspends.

CRs-Fixed: 593658
Change-Id: I722f24fcee4a1d2bbfee4341c8bc6c36ff9e1ec8
Signed-off-by: Sana Venkat Raju <c_vsana@codeaurora.org>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>
spi_qsd: Add core message queue feature

Add support to use new message queue feature provided
by SPI core framework. It is having benefits of saving
code space and getting the benefits of improvements
implemented in the core. User can set the priority
of message queue at compile time.

CRs-Fixed: 458268
Change-Id: I3f3a70b20ed6f2c8ceb9c27d616c5ba19acb422c
Signed-off-by: Alok Chauhan <alokc@codeaurora.org>
Signed-off-by: Sana Venkat Raju <c_vsana@codeaurora.org>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>
spi_qsd: Fix bug in multi-xfer bam mode transaction

Spi doesn't handle multiple xfer per message scenario
(eg:Rd->Wr or Wr->Rd) correctly and spi request
stuck indefinetly in while loop when total byte count
is not 0.

increment both(rx,tx) references so next bam
transaction will be queued correctly. Flush the
bam pipes after each transactions.

CRs-Fixed: 637693
Change-Id: I455df38be2f9687b1eb2a704466f6974dfb83a22
Signed-off-by: Alok Chauhan <alokc@codeaurora.org>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>
spi_qsd: Initialize wait queue

Due to missing initialization of wait queue
issues reported on customer builds. This patch
adds the missing wait queue initialization code.

Change-Id: I2150d94bfec74b26842aac4fbd0e2e44af3b9943
Signed-off-by: Sana Venkat Raju <c_vsana@codeaurora.org>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>