MFC r256932, r256938, r256966, r256953, r256967, r256969, r257015:

  Add a new function (OF_getencprop()) that undoes the transformation applied
  by encode-int. Specifically, it takes a set of 32-bit cell values and
  changes them to host byte order. Most non-string instances of OF_getprop()
  should be using this function, which is a no-op on big-endian platforms.

  Use the new function all over the place.
MFC r256973, r256974

 If the device tree directly contains the timebase frequency, use it. This
 property is required by ePAPR, but maintain the fallback to bus-frequency
 for compatibility.  Allow 32 or 64 bits.
MFC r256994, r257016, r257055, r257059, r257060, r257075

  Add two new interfaces to ofw_bus:
  - ofw_bus_map_intr()
    Maps an (iparent, IRQ) tuple to a system-global interrupt number in some
    platform dependent way. This is meant to be implemented as a replacement
    for [FDT_]MAP_IRQ() that is an MI interface that knows about the bus
    hierarchy.
  - ofw_bus_config_intr()
    Configures an interrupt (previously mapped) based on firmware sense flags.
    This replaces manual interpretation of the sense field in bus drivers and
    will, in a follow-up, allow that interpretation to be redirected to the PIC
    drivers where it belongs. This will eventually replace the tables in
    /sys/dev/fdt/fdt_ARCH.c

  The PowerPC/AIM code has been converted to use these globally, with an
  implementation in terms of MAP_IRQ() and powerpc_config_intr(), assuming
  OpenPIC, at the bus root in nexus(4). The ofw_bus_config_intr() will shortly
  be integrated into pic_if.m and bounced through nexus into the PIC tree.

  Factor out MI portions of the PowerPC nexus device into /sys/dev/ofw. The
  sparc64 driver will be modified to use this shortly.

  Allow PIC drivers to translate firmware sense codes for themselves. This
  is designed to replace the tables in dev/fdt/fdt_ARCH.c, but will not
  happen quite yet.

  Do not map IRQs twice. This fixes PowerPC/FDT systems with multiple PICs,
  which would try to treat the previously-mapped interrupts from
  fdt_decode_intr() as interrupt line numbers on the same parent PIC.

  Remove some of the code required for supporting ssm(4) on SPARC in favor
  of a more PowerPC/FDT-focused design. Whenever SPARC64 is integrated
  into this rework, this should be (trivially) revisited.
MFC r257093:

  Be a little more suspicious of thermal sensors, which can have single
  crazy readings occasionally. One wild reading should not be enough to
  trigger a shutdown, so instead wait for several concerning readings in
  a row.
MFC r257114, r257118

  Use common OFW root code to set up fdtbus. This is an almost purely
  negative diff that should improve reliability somewhat. There should be
  no differences in behavior -- please report any that crop up. This has been
  tested on ARM and PPC systems.

  Make sure to get the right node when looking up #interrupt-cells.