netdev/phy/icplus: Correct broken phy_init code

The code for ip1001_config_init() was totally broken if you were not
using RGMII. Instead of returning an error code or zero it actually
returned the value in the IP1001_SPEC_CTRL_STATUS_2 register. It was
also trying to set the IP1001_APS_ON bit , but never actually wrote
back the register.

The error checking was also incorrect in both this function and the
reset function, so this patch fixes that up in a consistent fashion.

Signed-off-by: David McKay <david.mckay@st.com>
Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
net: specify phy_if for RGMII mode

Some phys like ICPlus IP1001 require this flag to be set
in order to setup proper clock delay.

Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
arm: increase FORCE_MAX_ZONEORDER for TI AM33XX

FORCE_MAX_ZONEORDER of 12 is needed to allocation more than 4MB
of consistent DMA memory (da8xx frame buffer driver).

Signed-off-by: Dejan Gacnik <dejan.gacnik@gmail.com>
Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
AM335X: Read Cortex M3 Firmware Version.

CM3 firmware writes M3 firmware version on initialization into
"PARAM1_REG" register so that firmware version is available for
read on Cortex A8 side during bootup.
M3 firmware gives interrupt to cortex A8 after its initialization.
Then Cortex A8 reads "PARAM1_REG" register and stores its value
into global variable "m3_version".
If CM3 firmware writes its firmware version, it gets printed on
bootup as "Cortex M3 Firmware Version = 0x17"(as M3 firmware
version is 0x17 while writing this patch) otherwise gets printed
as "Unable to read CM3 firmware version".

[gururaja.hebbar@ti.com: Fix merge conflicts]

Signed-off-by: Manish Badarkhe <manishv.b@ti.com>
Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com>
ARM: OMAP2+: AM33xx: mux: update pin-mux table

- correct pin-mux offset value
	According AM335x TRM (spruh73g.pdf Table 9-10. CONTROL_MODULE
	REGISTERS, page 756), offset of PMIC_POWER_EN pin-mux register
	is 0x9FC from the Control Module register.
- Align the #define according to the offset.
- Add missing pin-mux entries
- Add missing pin-mux string entries
- Remove pin-mux string names from pins which are Read-Only (like
  Analog input, DDR pins)

Signed-off-by: Hebbar Gururaja <gururaja.hebbar@ti.com>
ARM: OMAP2+: AM33xx: move pinmux configuration to appropriate module

The current code snippet in pm33xx.c saves and restores a subset of the
registers during suspend/resume. Since the code deals with pinmux and
there is a separate file (mux33xx.c), move the function implementation
there.
This also makes way for adding IO Pad optimization feature to the
suspend/resume sequence.

Signed-off-by: Hebbar Gururaja <gururaja.hebbar@ti.com>
ARM: OMAP2+: AM33xx: PM: Add option to configure IO PADs during suspend

Low power during suspend can be achieved with Optimum IO pad
configuration. However, the value to be configured can vary across pads
and the wake-up source (uart, tsc, gpio ...).

This patch-set provides an method to configure the same through a
debugfs approach.

User should know the IO pads to be configured and the value to be
written to them. The PAD offset & the value depends mainly on the
wake-up source selected.

This patch-set provides a 2 debugfs entry for providing such feature.

Inside <debugfs-mount-dir>/omap_mux/suspend_io_pad_conf (Directory
where these features are available)

	enable_suspend_io_pad_conf
	suspend_pad_conf

enable_suspend_io_pad_conf
	- enable io pad configuration during suspend.
	  Example: "echo 1 > enable_suspend_io_pad_conf" enables IO PAD
	  Configuration.

suspend_pad_conf
	- takes the name of pin-mux that is to be setup during suspend
	  with value. Pin-mux name should be in
	  "mode0_name.function_name" format. Internally the pin-mux
	  offset is calculated from  the pin-mux name. Invalid pin-mux
	  names and values are ignored.
	  Remember, NO spaces anywhere in the input.

	Example:
	  echo mcasp0_aclkx.gpio3_14=0x27 > suspend_pad_conf
		stores 0x27 as the value to be written to the pinmux
		(with mode0_name.function_name as
		mcasp0_aclkx.gpio3_14) when entering suspend

If "enable_suspend_io_pad_conf" is set, then the entire pin-mux is saved, the
user setup pin-mux registers are setup with the value provided by the
user. During resume, the original values saved are restored back.
The value that the user sets are only copied to physical registers
during suspend iff "enable_suspend_io_pad_conf" is set.

User should make sure that the mux mode exists for the selected pin-mux.

Also, since omap_mux_get_by_name() will be called later during runtime,
drop the __init annotation, in order to prevent section mismatches.

Signed-off-by: Hebbar Gururaja <gururaja.hebbar@ti.com>
ARM: OMAP2+: AM33xx: Enhance McASP FIFO length

Existing fifo level of 1 being configured for McASP is as good as
fifo being disabled. Increase the fifo level so as to fully utilize
McASP FIFO support.

The maximum fifo level possible is 64. It this patch, it is being
set to the midway point 32 so that there is some fifo available
for new data when the level is reached.

Signed-off-by: Hebbar Gururaja <gururaja.hebbar@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
usb: musb: cppi41: workaround fix for Early TxFifoEmpty Interrupt

The TxFifoEmpty interrupt is used to workaround TxDMA early
completion issue. The TxDMA generates interrupt while transmit
data is still in txfifo. The SW need to wait/poll in workthread till
last byte from TxFifo is transfered out. To avoid this TxFifoEmpty
interrupt used to make sure last byte is transfer out.

When TxFfifoEmpty interrupt is enabled, the dma completion interrupt
occurs first followed by TxFifoEmpty interrupt. But sometimes
TxFifoEmpty occurs first and then dma completion Interrupt.
This patch fixes this by handling the dma completion interrupt
in the TxFifoEmpty interrupt handler.

This logic enabled only for isochrnous transfer type.

Signed-off-by: Ravi Babu <ravibabu@ti.com>
usb: musb: cppi41: rxdma generic configuration for both host and device

For device mode: by default transparent mode is used, for SoCs which
has infinite mode support can use this feature by enabling infinite mode

For host mode : by default transparent mode is used in rx direction

The generic rndis mode and infinte mode for both host is verfied
but disabled due to IP/HW limitation of extra IN/token & datatoggle issues

forced rxdma to use transparent mode for gadget mode.

Signed-off-by: Ravi Babu <ravibabu@ti.com>
usb: musb: cppi41: remove unnecessary reserved space for desc region

the index for descriptor starts from 0, there is no reserved
descriptor for unallocated memory region

Signed-off-by: Ravi Babu <ravibabu@ti.com>
usb: musb: cppi41: enable the txfifo empty interrupt logic for am33xx

This patch will enable the txfifo empty interrupt logic for
am33xx SoC which supports this features.
This logic is enabled only for isochronous transfers, does not
work reliablely for other transfer types.

Signed-off-by: Ravi Babu <ravibabu@ti.com>
usb: musb: host: reset dma->actual_len after transfer complete

Signed-off-by: Ravi Babu <ravibabu@ti.com>
usb: musb: host: fix for out of order giveback of URBs

Signed-off-by: Ravi Babu <ravibabu@ti.com>
usb: misc: introduce OTG & EH Test Driver

This patch introduces support for test modes as
defined by the USB OTG & Embedded host Specification.

Note that we _must_ be able to suspend & resume ports
as we wish, so this driver depends on USB_SUSPEND and
makes use (well, somewhat abuses) usb autopm features
to achieve what we want.

Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Ravi Babu <ravibabu@ti.com>
usb: musb: ti81xx: fix for handling vbus error

some bus powered devices can draw more current and can cause
fluctuation in vbus leads to vbuserror condition, the workaround
fix is to set session and wait till vbus raise to above valid
threshold.

Signed-off-by: Ravi Babu <ravibabu@ti.com>
mtd/nand/omap2: Free the memory allocated in probe

Instead of freeing memory allocated for omap_nand_info in probe, member
being freed in remove. This patch fixes the same.

This patch back-ported from mainline kernel
7d9b110269253b1d5858cfa57d68dfc7bf50dd77
mtd: omap2: fix omap_nand_remove segfault

[avinashphilip@ti.com: changed the commit message to give better
description of the bug]

Signed-off-by: Andreas Bießmann <andreas@biessmann.de>
Signed-off-by: Philip Avinash <avinashphilip@ti.com>
ARM: OMAP2+: AM335X: Add ADC platform data

Add platform data pertaining to ADC.
By default 4 input lines i.e. (AIN4 - AIN7) are enabled as
ADC lines.

Signed-off-by: Patil, Rachna <rachna@ti.com>
ARM: OMAP2+: AM335x: Update defconfig with ADC support

Enable ADC in AM335x default config

Signed-off-by: Patil, Rachna <rachna@ti.com>
MFD: ti_tscadc: register children only when they are available.

Not all children(TSC/ADC) are available on all platforms.
Previously either of TSC/ADC which is not required had to be
explicitly disabled from menuconfig.
Now registering a client driver is based on whether respective client
platform data is present or not.

Signed-off-by: Hebbar Gururaja <gururaja.hebbar@ti.com>
Signed-off-by: Patil, Rachna <rachna@ti.com>
Acked-by: Vaibhav Hiremath <hvaibhav@ti.com>