Remove JMI, BRC and BRA instructions.

These can all be implemented using standard ALU operations whose target
is PC, since PC just acts like a register as far as the ALU is concerned.
Remove IEN and IDI instructions for now.

The design doesn't yet have any interrupt features, so we don't need these
opcodes.
Add a note about the behavior of the condition bit.

The condition bit will be part of the input into the control state machine,
allowing some state transitions to vary based on this bit. However, each
conditional instruction is expected to have an unconditional counterpart
that is implemented by simply forcing the condition bit high using the
LSB of the opcode.
Some notes on the control state machine.