Adding file Configuration/Generator/python/DYToll0123Jets_5f_LO_MLM_Madgraph_LHE_13TeV_cff.py as first step for LHE generation in RelVal. 11/17/2014 (nugent@physik.rwth-aachen.de)
adding Configuration/Generator/python/Generator_lhe2HepMCConverter_cff.py to convert lhe to hep format. (first version - issue with missing LHERunInfoProduct)
patch to get DYToll0123Jets_5f_LO_MLM_Mmadgraph_LHE_13TeV_cff to run in relval generator sequence... + added to generator sequence
Adding  new jet matching interface to gen validation request by Josh for this pull request + patches to lhe relval found during testing(validation in progress - may have more).
moving new Hadronizer_MgmMatchTuneCUETP8M1 genfrag with jetmatching to new files and adding originals back. Adding patch to new Hadronizer_MgmMatchTuneCUETP8M1JetMatching*. Modifying relval_steps.py for this update.
Patch: removed old matching from Hadronizer_MgmMatchTuneCUETP8M1JetMatching* files which was not removed
Patch: added new harvesting command to fix the change in the name of the DQM file when running 2 spteps before harvesting. <nugent@physik.rwth-aachen.de>
Updating file names to match convention request by Josh: Hadronizer_TuneCUETP8M1_8TeV_MLM_5f_max4j_LHE_pythia8* and fixing nJetMax=4 new gen frag. This update also include changes to the naming to the relval sequences to match this new convention. <nugent@physik.rwth-aachen.de>
Updating file names to match convention request by Josh (fix 8TeV->13TeV in file names and in workflow). <nugent@physik.rwth-aachen.de>
Updating file names to match convention request by Josh (fix 8TeV->13TeV in file names and in workflow). <nugent@physik.rwth-aachen.de>
Updating file names to match convention request by Josh (fix for DYToll0123->DYToll01234 in relval_steps.py. <nugent@physik.rwth-aachen.de>
Adding request from Giovanni Franzoni: 1) step1GenDefaults from auto:run1_mc to auto:run2_mc_FULL; 2) switch to auto:run2_mc_Full also HARVESTGEN; 3) change HARVESTGEN2 to steps['HARVESTGEN2']=merge([{'--filein':'file:step2_inDQM.root'},steps['HARVESTGEN']]) + setting q cut to 20GeV at Josh's request
Merge branch 'RelValAddingLHE_7_3_X' of github.com:inugent/cmssw into from-CMSSW_7_3_X_2014-11-25-1400

Conflicts:
	Configuration/PyReleaseValidation/python/relval_steps.py
Update relval_steps.py

Update RelVal so length of step1LHEDefault step is ~3-4hr using estimate of 2sec per event.
Enable USE_SSEVECT only on x86_64 with SSE

Patch enables USE_SSEVECT (vector implementation based on SSE
intrinsics) only on a proper hardware, i.e, x86_64 with SSE.

For the rest of architectures (armv7hl, aarch64, power8, etc.) use
USE_EXTVECT.

Signed-off-by: David Abdurachmanov <David.Abdurachmanov@cern.ch>
Merge pull request #6626 from inugent/RelValAddingLHE_7_3_X

Adding first LHE sequence to RelVal
Merge pull request #6667 from davidlt/USE_SSEVECT-only-on-sse-hw

Enable USE_SSEVECT only on x86_64 with SSE
Merge remote branch 'origin/CMSSW_7_4_X' into CMSSW_7_0_X