Import mdocml version 1.12.3
Add hwpmc(4) support for the PowerPC 970 class processors, direct events.
This also fixes asserts on removal of the module for the mpc74xx.

The PowerPC 970 processors have two different types of events: direct events
and indirect events.  Thus far only direct events are supported.  I included
some documentation in the driver on how indirect events work, but support is
for the future.

MFC after:	1 month
Add a comment about the origin of some structures, defines and so on.

MFC after:	1 week
Merge mdocml v1.12.3 into head

MFC after:	2 weeks
Add definition for NetBSD 7.0, which is referenced in several manpages.

Discussed with:	uqs
MFC after:	5 days
Bring the exit status wording closer to what .Ex would produce.
Fixes a typo in the process.

MFC after:	1 week
Remove the .Ex macro that I used for testing.

Pointy hat:	brueffer
Open Firmware interrupt specifiers can consist of arbitrary-length byte
strings and include arbitrary information (IRQ line/domain/sense). When the
ofw_bus_map_intr() API was introduced, it assumed that, as on most systems,
these were either 1 cell, containing an interrupt line, or 2, containing
a line number plus a sense code. It turns out a non-negligible number of
ARM systems use 3 (or even 4!) cells for interrupts, so make this more
general.
Provide a simpler and more standards-compliant simplebus implementation to
get the Routerboard 800 up and running with the vendor device tree. This
does not implement some BERI-specific features (which hopefully won't be
necessary soon), so move the old code to mips/beri, with a higher attach
priority when built, until MIPS interrupt domain support is rearranged.
Fix AT91SAM9260 to work with PA rather than VA device addresses.
In _pthread_kill(), if passed pthread is current thread, do not send
the signal second time, by adding the missed else before if statement.

While there, postpone initializing local curthread variable until
passed signal number is checked for validity.

Submitted by:	John Wolfe <jlw@xinuos.com>
PR:	threads/186309
MFC after:	1 week
Fix typo.
Avoid spurious compiler warning about an uninitialized variable.
ULE works on Book-E since r258002, so remove statements to the contrary.
Switch default Book-E scheduler to ULE, which works now, and enable
CAPABILITIES stuff required to make ssh work.

Hopefully, Book-E can eventually be added to GENERIC, which would avoid
this kind of issue with bitrot. That will require figuring out how to link
Book-E and AIM kernels at the same address, however...
Update all arm code that manipulates the PSR registers to use modern syntax.

It turns out the version of gas we're using interprets the old '_all' mask
as 'fc' instead of 'fsxc'.  That is, "all" doesn't really mean "all".

This was the cause of the "wrong-endian register restore" bug that's
been causing problems with some cortex-a9 chips.  The 'endian' bit in the
spsr register would never get changed (it falls into the 'x' mask group)
and the first return-from-exception would fail if the chip had powered on
with garbage in the spsr register that included the big-endian bit.  It's
unknown why this affected only certain cortex-a9 chips.
Do not place the sglist used for Rx/Tx on the stack

The sglist segment array has grown to a bit over 512 bytes (on
64-bit system) which is more than ideally should be put on the
stack. Instead allocate an appropriately sized sglist and hang
it off each Rx/Tx queue structure.

Bump the maximum number of Tx segments to 64 to make it unlikely
we'll have defragment an mbuf chain. Our previous count was
rounded up to this value since it is the next power of two, so
effective memory usage should not change.

Also only allocate the maximum number of Tx segments if TSO was
negotiated.
Use m_defrag() instead of m_collapse() to compact a long mbuf chain

This should be an infrequent occurrence, so remove the per-queue
counters in favor of just global counters in the softc.
Fix typo. Sorry for breakage!
Allow nesting of simplebuses.