Add ARM CPU topology

** This is a combination of 12 commits.
** The first commit's message is:
Add ARM cpu topology definition

(Patch accepted by Russell for 3.1:
http://www.spinics.net/lists/arm-kernel/msg131273.html)

The affinity between ARM processors is defined in the MPIDR register.
We can identify which processors are in the same cluster,
and which ones have performance interdependency. We can define the
cpu topology of ARM platform, that is then used by sched_mc and sched_smt.

The default state of sched_mc and sched_smt config is disable.
When enabled, the behavior of the scheduler can be modified with
sched_mc_power_savings and sched_smt_power_savings sysfs interfaces.

Changes since v4 :
*  Remove unnecessary parentheses and blank lines

Changes since v3 :
* Update the format of printk message
* Remove blank line

Changes since v2 :
* Update the commit message and some comments

Changes since v1 :
* Update the commit message
* Add read_cpuid_mpidr in arch/arm/include/asm/cputype.h
* Modify header of arch/arm/kernel/topology.c
* Modify tests and manipulation of MPIDR's bitfields
* Modify the place and dependancy of the config
* Modify Noop functions

Signed-off-by: Vincent Guittot <vincent.guittot@linaro.org>
Reviewed-by: Amit Kucheria <amit.kucheria@linaro.org>
Signed-off-by: Amit Kucheria <amit.kucheria@verdurent.com>
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>

** This is the 2nd commit message:

ARM: cpu topology: fix warning

kernel/sched.c:7354:2: warning: initialization from incompatible pointer type

Align cpu_coregroup_mask prototype interface with sched_domain_mask_f typedef
use int cpu instead of unsigned int cpu

Signed-off-by: Vincent Guittot <vincent.guittot@linaro.org>

** This is the 3rd commit message:

ARM: cpu topology: Add update_cpu_topology function

arch_update_cpu_topology function is called by the scheduler
before building its sched_domain hierarchy. Prepare the update
of the cpu topology masks in this function in addition to set
it in the the store_cpu_topology which is executed only once per cpu.

Signed-off-by: Vincent Guittot <vincent.guittot@linaro.org>

** This is the 4th commit message:

ARM: cpu topology: modify cpu topology

Modify the CPU topology policy according to the sched_mc level and the cortex family

Signed-off-by: Vincent Guittot <vincent.guittot@linaro.org>

** This is the 5th commit message:

ARM: scheduler: add a cpu_power function

Add an architecture specific function for setting cpu_power

Signed-off-by: Vincent Guittot <vincent.guittot@linaro.org>

** This is the 6th commit message:

ARM: cpu topology: Modify cpu_power according to sched_mc level

Signed-off-by: Vincent Guittot <vincent.guittot@linaro.org>

** This is the 7th commit message:

ARM: cpu topology: Modify cpu_power according to cpufreq

Signed-off-by: Vincent Guittot <vincent.guittot@linaro.org>

** This is the 8th commit message:

ARM: cpu topology: Add asym topology flag for using cpu0 1st

Modify the CPU sched_domain flags in powersave mode for using the cpu0 in ched_mc powersave mode

Signed-off-by: Vincent Guittot <vincent.guittot@linaro.org>

** This is the 9th commit message:

ARM: cpu topology: Add debugfs interface for cpu_power

Signed-off-by: Vincent Guittot <vincent.guittot@linaro.org>

** This is the 10th commit message:

sched: Ensure cpu_power periodic update

With a lot of small tasks, the softirq sched is nearly never called
when no_hz is enable. The load_balance is mainly called with
the newly_idle mode which doesn't update the cpu_power.
Add a next_update field which ensures a maximum update period when
there is short activity

Signed-off-by: Vincent Guittot <vincent.guittot at linaro.org>

** This is the 11th commit message:

ARM: scheduler: add a missing part
This fix adds a missing part in the [RFC 07/11].

Signed-off-by: Vincent Guittot <vincent.guittot at linaro.org>

** This is the 12th commit message:

sched: nohz_idle_balance

clear rq->nohz_balance_kick before returning

if idle equals CPU_IDLE, we return and could let nohz_balance_kick set
rq->nohz_balance_kick is tested in nohz_balancer_kick before triggering a SOFTIRQ on the ilb.
If this_rq->nohz_balance_kick stay to 1, the ilb will no be triggered until it wakes up and performs a normal load_balance which will clear the nohz_balance_kick

Signed-off-by: Vincent Guittot <vincent.guittot at linaro.org>
drivers: core: mmc: disable CRC

Signed-off-by: Locasto <amperific@gmail.com>
ARM: Add optimised swahb32() byteswap helper for v6 and above

ARMv6 and later processors have the REV16 instruction, which swaps
the bytes within each halfword of a register value.

This is already used to implement swab16(), but since the native
operation performaed by REV16 is actually swahb32(), this patch
renames the existing swab16() helper accordingly and defines
__arch_swab16() in terms of it.  This allows calls to both swab16()
and swahb32() to be optimised.

The compiler's generated code might improve someday, but as of
4.5.2 the code generated for pure C implementing these 16-bit
bytesswaps remains pessimal.

swahb32() is useful for converting 32-bit Thumb instructions
between integer and memory representation on BE8 platforms (among
other uses).

Signed-off-by: Dave Martin <dave.martin@xxxxxxxxxx>
panic: Fix a possible deadlock in panic()

panic_lock is meant to ensure that panic processing takes
place only on one cpu; if any of the other cpus encounter
a panic, they will spin waiting to be shut down.

However, this causes a regression in this scenario:

1. Cpu 0 encounters a panic and acquires the panic_lock
   and proceeds with the panic processing.
2. There is an interrupt on cpu 0 that also encounters
   an error condition and invokes panic.
3. This second invocation fails to acquire the panic_lock
   and enters the infinite while loop in panic_smp_self_stop.

Thus all panic processing is stopped, and the cpu is stuck
for eternity in the while(1) inside panic_smp_self_stop.
To address this, disable local interrupts with
local_irq_disable before acquiring the panic_lock. This will
prevent interrupt handlers from executing during the panic
processing, thus avoiding this particular problem.

Signed-off-by: Vikram Mulukutla <markivx@codeaurora.org>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
irq: Set CPU affinity as soon as the irq thread is created

In an embedded target where IRQ affinities are pre-configured during
boot-time (and not modified through /proc/irq/../smp_affinity) during
run-time, the extra latency due to irq_thread_check_affinity can be
avoided during processing of the first interrupt with this patch.
Thoughts?

backported from Linux 3.5+ by faux123
kernel/timer: Optimise apply_slack() for size and speed.

To apply proper slack, the original algorithm used to prepare a mask and
then apply the mask to obtain the appropriately rounded-off absolute
time the timer expires.

This patch modifies the masking logic to a bit-shift logic, therby
reducing the complexity and number of operations. Thus obtaining a minor
speed-up.

Signed-off-by: Chinmay V S <chinmay.v.s@pathpartnertech.com>
misc: uidstat: avoid create_stat() race and blockage.

* create_stat() race would lead to:
  [   58.132324] proc_dir_entry 'uid_stat/10061' already registered

* blocking kmalloc reported by sbranden
 tcp_read_sock()
  uid_stat_tcp_rcv()
    create_stat()
      kmalloc(GFP_KERNEL)

Signed-off-by: JP Abgrall <jpa@google.com>
mm: remove slub page allocation
Bluetooth: Fix crash in l2cap_build_cmd() with small MTU

Signed-off-by: Locasto <amperific@gmail.com>