Neb Dynarec, part 3: Emitters for SLL, SRL and SRA and support code

Operations that work on N64 registers (and therefore on &reg[N] in
native memory) require these emitters to work:
* Enough emitters to load a 32-bit value from an address.
* Enough emitters to sign-extend a 32-bit value. On 64-bit
  architectures, the sign-extension is performed on the 64-bit
  register; on 32-bit architectures, the low half is stored, then
  its sign-extension is performed on the 32-bit register and the
  resulting high half is stored.
* Enough emitters to store a 64-bit value to an address. On 64-bit
  architectures, that is a single store, but on 32-bit architectures,
  that is two 32-bit stores.

To allow the 32-bit loads to correctly get the low part of a 64-bit
value, ARCH_IS_LITTLE_ENDIAN or ARCH_IS_BIG_ENDIAN is required in
[arch]/config.h. These are added for mipsel32 and amd64. Loads and
stores are adjusted by 0 or 4 depending on whether the least- or the
most-significant 32-bit portion is being manipulated.