JIT: discard values that will not be used again

This dramatically reduces register pressure in long blocks, cutting instruction
count by 5% or more in some.

This is an "unsafe" optimization: an error in the optimizer could result in
incorrect code (e.g. necessary values thrown out), not merely suboptimal code
(as in the case of the other register-usage optimizations in PPCAnalyst).

Fix an interpreter_tables mistake in the definition of srawix: srawix does not
use RB as an input. Having interpreter_tables be precisely correct is doubly
important now, given that this optimization relies on its correctness.

Also clean up and comment more of PPCAnalyst and make it more consistent.
Make sure it accounts for every possible block exit point, even exception ones,
so that the optimization is correct in all cases.

**This is a moderately dangerous optimization, so it probably needs a decent amount of testing to make sure nothing explodes.** I was also thinking there might be some way to enforce the constraints of this optimization inside the register cache (e.g. by marking a physical register as valid, but discarded, then erroring if it gets bound and loaded) to make sure problems don't occur, but there are some subtleties: for example, falling back to interpreter flushes the register cache but does not require all the values in the register cache to be correct, just the ones the interpreter uses.
The case I can see pre-loading being useful is something like this:
// f1, f2 in memory, f0 in regs
fadd f0, f1, f2
lfs f1, [r0+0]
If we don't preload f1, the asm looks like:
movapd f0, [f1]
addpd f0, [f2]
movapd f1, [f1]
; slowmem load goes here
If we do, the asm looks like this:
movapd f1, [f1]
vaddpd f0, f1, [f2]
; slowmem load goes here

On the other hand, as it currently is, it'll make non-MMU mode slightly worse for the first fpu instruction of each block, which is definitely wrong too.