[PPC64] VSX indexed-form loads use wrong instruction format

The VSX instruction definitions for lxsdx, lxvd2x, lxvdsx, and lxvw4x
incorrectly use the XForm_1 instruction format, rather than the
XX1Form instruction format.  This is likely a pasto when creating
these instructions, which were based on lvx and so forth.  This patch
uses the correct format.

The existing reformatting test (test/MC/PowerPC/vsx.s) missed this
because the two formats differ only in that XX1Form has an extension
to the target register field in bit 31.  The tests for these
instructions used a target register of 7, so the default of 0 in bit
31 for XForm_1 didn't expose a problem.  For register numbers 32-63
this would be noticeable.  I've changed the test to use higher
register numbers to verify my change is effective.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219416 91177308-0d34-0410-b5e6-96231b3b80d8
Move DwarfUnit::constructVariableDIE down to DwarfCompileUnit, since it's only needed there.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219418 91177308-0d34-0410-b5e6-96231b3b80d8
Sink DwarfDebug.cpp::constructVariableDIE into DwarfCompileUnit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219419 91177308-0d34-0410-b5e6-96231b3b80d8
R600/SI: Legalize INSERT_SUBREG instructions during PostISelFolding

LLVM assumes INSERT_SUBREG will always have register operands, so
we need to legalize non-register operands, like FrameIndexes, to
avoid random assertion failures.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219420 91177308-0d34-0410-b5e6-96231b3b80d8