msm: vidc: Disable clock gating for 8x26

There are stability issue observed on 8x26 with
inter-frame clock gating enabled so disable
interframe clock gating on 8x26.

Change-Id: I0e2b89a0ce36ed4d5f15903ffe68b7c7275719c9
Signed-off-by: Vinay Kalia <vkalia@codeaurora.org>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>
msm: vidc: fix memory leak issue in dynamic buffer mode

While flushing output buffers held in v4l2 video
driver, i.e, with ref count equal to 2, the driver
was freeing the binfo structure. This would leak
the mapped output buffer memory. By avoiding
freeing of the binfo structure, the driver waits
for the release reference event from the firmware
to free and unmap the output buffer. Also move
initialization of dequeued flag for buffers to be
held in driver, till the time we queue this buffer
to firmware. By not doing so, the video driver can
enter a race condition, whereby, a output buffer could
be unmapped and freed before v4l2 client has called
dequeue on the buffer.

Change-Id: Ic95f13b9f4426574012539a76c0b87bedb8e805a
Signed-off-by: Arun Menon <avmenon@codeaurora.org>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>
msm: vidc: update max P frames num for encode

Remove the restriction on the max number of
P frame interval.

Change-Id: I637372d7b0d409602df251bad4a135b25514dc95
Signed-off-by: Arun Menon <avmenon@codeaurora.org>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>
msm: vidc: add sleep of 100us before clock disable

ARM9 execute following sequence when venus is idle
1. Disable ARM9 watchdog
2. Set bit 30 of A_VENUS_CPU_CS_SCIACMDARG0 register
   to indicate venus is idle
3. Write HFI_MSG_SYS_IDLE to message queue
4. Raise interrupt to host
5. ARM9 execute wait for interrupt instruction to go
   into low power state. This will internally drain the
   ARM9 write buffer which can generate bus transaction.
6. ARM9 in idle

Host clock gate venus based on following sequence
1. Host receive HFI_MSG_SYS_IDLE from the msg queue
2. Host check both cmd / msg queue are empty by
   comparing the queue read/write pointers.
3. Host check bit 30 of A_VENUS_CPU_CS_SCIACMDARG0
   register to confirm it indicate idle
4. Host clock gate whole venus

As the host clock gate venus in step 4, ARM9 is still
in step 5&6. The sleep will ensure that step 5 and 6
are completed before host clock gates venus.

CRs-Fixed: 589417
CRs-Fixed: 595251
Change-Id: Idf1f788718adea2dacceca97afa4ba4fe4562ddd
Signed-off-by: Vikash Garodia <vgarodia@codeaurora.org>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>
msm: vidc: Validate session_id in video hardware response

Validate session_id present in video hardware response
packet before processing it. This will avoid system reset
resulting from invalid session_id returned from video hardware.

Change-Id: I37525a3d10b5efe00734c5533931e2700f3c7513
Signed-off-by: Maheshwar Ajja <majja@codeaurora.org>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>
msm: vidc: Skip session id validation for HFI_EVENT_SYS_ERROR

When SSR is triggered from driver, firmware is responding with session id
as 0X0000dead. Hence, firmware response is being discarded due to such
invalid session id. Skip session id validation for HFI_EVENT_SYS_ERROR
event type.

Change-Id: I750a7332baab4ebeb7702b49ffb744aae9803a36
CRs-Fixed: 539080
Signed-off-by: Srinu Gorle <sgorle@codeaurora.org>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>