ARM: i.MX53: Rename sata clocks according to Linux dts

I accidently merged the initial data device node which contained
clocks in the sata node which were not compatible to the ones
in the kernel. Fix this.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
ARM: mx53-qsrb: enable USB host

- declare the rigth mux for the GPIO used to enable the USB's 5V
- enable USB host controller

tested on i.MX53 START-R :
barebox@Freescale i.MX53 Quick Start-R Board:/ usb -f
USB: scanning bus for devices...
Bus 001 Device 001: ID 0000:0000 EHCI Host Controller
Using index 0 for the new disk
Bus 002 Device 003: ID 0951:1654 DT R500
Bus 002 Device 002: ID 0000:0000 EHCI Host Controller
3 USB Device(s) found

Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
ARM: mx53-qsrb: enable sata

tested on i.MX53 START-R :
barebox@Freescale i.MX53 Quick Start-R Board:/ ata0.probe=1
imx-sata 10000000.sata: port 0: SATA link ok
imx-sata 10000000.sata: port 0: Spinning up device...
imx-sata 10000000.sata: port 0: ok.
ata0: registered /dev/ata0

Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
ARM: mx53-qsb: update defconfig

- enable more commands :
    (menu, password, loadb, let, mm, sha*, bootz, of*, memtest)
- enable led and led triggers
- enable sata support
- enable USB chipidea support
- enable USB network drivers
- enable NFS and DNS support
- enable EXT4 support

Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
mtd: Update internal API to support 64-bit device size

MTD internal API presently uses 32-bit values to represent device
size. This patch updates them to 64-bits but leaves the external API
unchanged.

In general, changing from 32-bit to 64-bit values cause little
or no changes to the majority of the code with the following
exceptions:
  - printk message formats;
  - division and modulus of 64-bit values (mtd_div_by_wb,
    mtd_div_by_eb may be used in some of such cases).

Was tested on phyFLEX i.MX6.

Signed-off-by: Dmitry Lavnikevich <d.lavnikevich@sam-solutions.com>
Signed-off-by: Grigory Milev <g.milev@sam-solutions.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
mtd: Support for 4GB partitions

This patch implements correct way of creating partitions on mtd
devices with size >= 4GB.

Signed-off-by: Dmitry Lavnikevich <d.lavnikevich@sam-solutions.com>
Signed-off-by: Grigory Milev <g.milev@sam-solutions.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
ubi: Fix for creating ubi volumes with 64bit size

Since MTD is already supports >= 4GB device sizes it is better to
allow ubi valumes also be created of larger sizes.

Signed-off-by: Dmitry Lavnikevich <d.lavnikevich@sam-solutions.com>
Signed-off-by: Grigory Milev <g.milev@sam-solutions.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
nand: mxs: Check for up to 4 NAND chips

Since i.MX6 has only one R/B actual pin, if there are several R/B
signals (from different NAND chips) they must be connected to this
pin.

Signed-off-by: Dmitry Lavnikevich <d.lavnikevich@sam-solutions.com>
Signed-off-by: Grigory Milev <g.milev@sam-solutions.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
nand: mxs: Fix for calculating ecc strength on some types of NAND flash

Was tested on NAND with {writesize=4096, oobsize=224} and
{writesize=2048, oobsize=64}.

This patch will not break any NAND that was working
before. Implemented calculation way may be used for other NAND chips
with writesize == 2048 but oobsize != 64.

Signed-off-by: Dmitry Lavnikevich <d.lavnikevich@sam-solutions.com>
Signed-off-by: Grigory Milev <g.milev@sam-solutions.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
ARM: i.MX27: dts: Separate barebox-specific DT changes

To ease DT import from Linux, which is still maintained in-tree, we
separate barebox-specific changes by including the original dts in
a separate DT file. This allows to overlay modifications and keep
clean DT history. Additionally, this patch updates i.MX27 DTS tree.

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
import _AC and UL macros from linux kernel

This macros are used in exported from linux TI DaVinci code.
Also this macros are used in MIPS cache support code.

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
ARM: initial support for TI DaVinci SoCs

This commit adds minimal support for the DaVinci DM365 SoCs
from Texas Instruments.

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
ARM: davinci: add DEBUG_LL support

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
ARM: davinci: add clocksource

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
gpio: add driver for TI DaVinci SoCs

This driver is dts-only version of driver from Linux v3.14-rc5.

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
ARM: dts: Add TI TMS320DM365 devicetree file

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
ARM: davinci: add documentation

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
ppc: add SoC support for Freescale P1022

CPU, DDR, and LBC definitions are added to support the Freescale P1022.

Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
common: DDR3 SPD verification support

Add DDR3 SPD verification support for use by the PPC 8xxx DDR driver.

This is based on the equivalent files from U-Boot version git-be937b5.

Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
ppc: mpc8xxx: add DDR3 support

Add DDR3 support into the MPC8xxx DDR driver.

To avoid confusion, the function set_ddr_sdram_mode is renamed
set_ddr2_sdram_mode.

Checking for errors is simplified in the DDR2 DIMM parameters
computation to be consistent with DDR3.

This code is derived from the files found in directory drivers/ddr/fsl
from U-Boot version git-be937b5.

Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>