msm: bam_dmux: add downlink processing state logging

State transitions of the downlink packet processing task are not directly
logged.  This leads to information gaps when debugging downlink issues.

Add explict logging of the state transitions to provide complete
information on what the downlink processing task has done.

Change-Id: Ie253c9739447da6ed236e865b7f1ed318e13cb6e
Signed-off-by: Jeffrey Hugo <jhugo@codeaurora.org>
msm: scm-pas: Flush the metadata buffer

In the near future, scm_call will no longer flush
the entire cache in order to ensure that the secure
world doesn't see stale data. Therefore, flush the
metadata buffer from the cache before invoking
scm_call.

Change-Id: I0896d1bac074b6a4b004edfc1cb0a9a8de57999b
Signed-off-by: Vikram Mulukutla <markivx@codeaurora.org>
msm: socinfo: Add support for MSM8974PRO AA/AB/AC

Update the SoC ID mapping table and create cpu_is functions
to support the MSM8974PRO AA/AB/AC targets.

Change-Id: I0e9dfdb22462c68c7bc18edd5ef025f42760be06
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
msm: scm-pas: Remove cpu_is_* checks

The soc type check is included in scm_pas_init in order to assign
different source port IDs to the bus bandwidth voting vectors.
The check is removed by making scm_pas_init a function to which
the source port ID is passed in as a parameter. This change assumes
that the destination port remains the same across all SOCs. The
scm_pas_init function is invoked from individual pil drivers.

Change-Id: I7472d07ae560a16d2fd03b184e340e56a62985d2
Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
wcnss: Enable/disable WCNSS register dump on WCNSS bite

When Apps recieves a WDOG bite from WCNSS, collecting a register
dump of WCNSS is helpful to root cause the failure. WCNSS may not
be properly clocked in some WCNSS bite cases, and that may
cause unclocked register access failures.  So add a feature flag
so that customers can disable this register dump on production
builds.

Change-Id: Ifc9c577ac3a342634e01b3da9c12973c5c1a7713
CRs-Fixed: 556962
Signed-off-by: Sameer Thalappil <sameert@codeaurora.org>
msm: smem: Add NAND Device Item

Add new SMEM item used for passing NAND device parameters between
subsystems.

CRs-Fixed: 487179
Change-Id: I823e5073e02795386700109ccdf9fb7efff03fe5
Signed-off-by: Eric Holmberg <eholmber@codeaurora.org>
msm: pil: Proxy unvote after pil_shutdown() when using IRQs

Subsystems might use an IRQ for removal of proxy votes via the
power/clock ready interrupt. So, if a peripheral shutdown is triggered
before the power/clock ready interrupt is received, remove the proxy
votes and bypass the unvoting in the power/clock ready interrupt handler.
Conversely, if the power/clock interrupt is received before shutdown is
triggered, bypass the unvoting during pil shutdown.

Also, remove the hack to proxy unvote directly from the pil-q6v5-mss
driver.

Change-Id: I254ab5a1595ceb27a2cfcac99c4c1d2f2443b7c7
Signed-off-by: Seemanta Dutta <seemanta@codeaurora.org>
msm: pil-q6v5-mss: Factor out PIL code into a separate library.

pil-q6v5-mss.c contains code for both the PIL and subsystem
implementations. Factor out the PIL specific code into a
pil-msa.c library so it can be reused by other subsystems
which use the same/similar self-authentication mechanisms.

Change-Id: I7e27eafbd2c89c2747482f1162e7b28d9e5f7bca
Acked-by: Jennifer Zenner <jzenner@qti.qualcomm.com>
Signed-off-by: Seemanta Dutta <seemanta@codeaurora.org>
msm: pil-q6v5-mss: Do not generate redundant smem ramdump

When the device crashes, smem ramdump is already generated by the smem
driver. Therefore, the smem ramdump generated by pil-q6v5-mss is redundant
and the code responsible for it can be taken out.

CRs-fixed: 485208
Change-Id: I8b67ff9f54663b68268b7b87e9cb1f3930219afa
Signed-off-by: Seemanta Dutta <seemanta@codeaurora.org>
msm: pil-q6v5-mss: Initialize the stop ack completion variable

In case of targets that don't use the PIL framework to boot the modem,
the stop_ack completion variable might remain in uninitialized state as
the initialization is currently being done only within PIL callbacks.
So, fix this my initializing the completion variable outside of PIL
by callbacks.

Change-Id: I204b0fbf461b1e1f1d4576dc43e33c7442eaf0e0
Signed-off-by: Seemanta Dutta <seemanta@codeaurora.org>
msm: pil-q6v5-mss: Perform proxy voting/unvoting at mba bootup

Currently, both mba and q6 devices perform voting and unvoting during
bootup via pil. This is done because earlier the clock ready interrupt was
not provided by the modem booting up. But now that we have the clock ready
interrupt being sent by the modem, we can make the proxy votes for the PBL
while booting up. Later when the modem has finished booting up it would
send the clock ready interrupt and at that time we would remove the proxy
votes made for the PBL. So remove the PBL proxy votes after receiving the
clock ready interrupt from the modem.

Also, having IRQF_SHARED in the proxy unvote IRQ registration is
unnecessary because the the power/clock ready interrupt is not shared
among subsystems. So remove that as well.

Change-Id: Ie6ec27f6842c42c4240a9f09f8f49a190ab3c2f9
Signed-off-by: Seemanta Dutta <seemanta@codeaurora.org>
msm: subsystem_restart: Move device tree parsing code into the framework

Every driver has to repeat the code for parsing device tree nodes for the
SMP2P gpios. So, move this parsing code into the framework level to avoid
this duplication of code.

Change-Id: Ie27a5f37ce2b9718a5cc0ccf11c7abda1c6cb1df
Signed-off-by: Seemanta Dutta <seemanta@codeaurora.org>
msm: pil: Move device tree parsing code into the framework

Every driver has to repeat the code for parsing device tree nodes for the
proxy unvote IRQ. So, move this parsing code into the framework level to
avoid this duplication of code.

Change-Id: I8739af63f6f3bc95aaded74d60359256e5bd7a66
Signed-off-by: Seemanta Dutta <seemanta@codeaurora.org>
msm: pil-q6v5-mss: Correct kzalloc return path checking

devm_kzalloc returns NULL on failure, not an error code.
Fix the check done on mba_data after the allocation.

Change-Id: Ie7a75d8864889f0426a7f3fb54908e4869a719a8
Signed-off-by: Vikram Mulukutla <markivx@codeaurora.org>
msm: pil-venus: Move the GDSC control out of PIL driver

The PIL driver has full control of the Venus GDSC. It turns
on the GDSC when booting up venus and leaves it on until
venus is shutdown.

In order to save more power during video playback, interframe
power collapse can be used. This requires that the GDSC can be
turned on/off during video playback.

In order to allow the Venus driver to turn on/off the GDSC, the
PIL driver should no longer hold the GDSC on throughout the time
Venus is booted up. It is safe to do so since the Venus driver
has already added GDSC control.

Note that the proxy voting of GDSC is still present solely for
the purpose of allowing standalone testing of the Venus PIL
driver.

Change-Id: I49b7331d4ec40c08b1eba0a72942564899ca4b8f
Signed-off-by: Tianyi Gou <tgou@codeaurora.org>
msm: pil-venus: Decrease the proxy time out value

A smaller value of proxy time out (2 sec) is good enough for venus
driver to take over the control of the proxy voting resources.

Making proxy time out smaller also has the advantage that the venus
driver can do power collapse of the core sooner if needed to save
power.

Change-Id: I9bc1824de4817a565c908d5d7b8b61356d38d168
Signed-off-by: Tianyi Gou <tgou@codeaurora.org>
msm: pil-q6v5-lpass: Remove disabling watchdog irq multiple times

Disabling watchdog irq twice requires enabling it an equal number
of times. Due to the watchdog irq being disabled twice while being
enabled only once; on watchdog bite happening muliple times, the
watchdog handler is not fired for the subsequent ones.

This change makes sure that this is rectified by disabling the
irq only once when the subsystem is shutdown during restart.

Change-Id: I58732e6a6d3d484bed53dc8198e8794eefd1b45c
Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
msm: pil: Unregister modem notifer on failure to create kobj

Correct functionality to unregister the modem notifier if creating
a kobject for the audio voice service fails.

Change-Id: I69d9a3dadc736566aaf9e301606303dd3c7efa09
Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
msm: gdsc: Make enable/disable function clock controls symmetric

Currently, resets are asserted and de-asserted in the same order,
which works fine for cores with only one resettable clock domain,
but causes issues on 8x10 (VFE) where multiple clock domains are
resettable and order matters.

For cleanliness, also make the order of setting/clearing the memory
retention signals symmetric, although order there doesn't matter
at all.

Change-Id: I0d5edcd0d9fe121ed63e032915830a9c82ae5da2
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
msm: hsic_sysmon: Support multiple instances

Enhance the driver to support (currently up to 2) multiple sysmon
interface instances. This is done by classifying the supported PIDs
as either the first or second allowable instance. Add PID 9079 and
allow it to be instantiated as the second instance. Also make use
of the new USB_DEVICE_INTERFACE_NUMBER macro.

Change-Id: I6f9fbf37d151dcce1d0bcf5204460ce0732730f1
Signed-off-by: Jack Pham <jackp@codeaurora.org>