JIT64: tweak srwx/slwx BindToRegister arguments

Register B gets immediately moved into the shift register, so even if a == b
it doesn't need to be loaded.
JIT64: optimize carry handling

Carries are rather common and unpredictable, so do them branchlessly wherever
we can.
JIT64: optimize some special cases of srawix

Shift by 31 and 1, both of which are pretty common, can be done in a few less
instructions. Tested with a hwtest.
JIT64: support merged branching for rlwinmx, too

Not quite as common a branch instruction as cmpwi, but close.
JIT: unify subfe/submex/subfex/adde/addmex/addzex code

Shorter, plus should make future optimizations easier.
JIT: unify subfcx and addcx code

Again, shorter and should make future optimizations easier.
JIT64: optimize carry calculations

Omit carry calculations that get overwritten later in the block before they're
used. Very common in the case of srawix and friends.
JIT64: optimize carry calculations further

Keep carry flags in the x86 flags register if used in the next instruction.
PPCAnalyst: refactor, add carry op reordering and non-cmp reordering

Tries as hard as possible to push carry-using operations (like addc and adde)
next to each other. Refactor the instruction reordering to be more flexible
and allow multiple passes.

353 -> 192 x86 instructions on a carry-heavy code block in Pokemon Puzzle.
12% faster overall in Pokemon Puzzle; probably less in typical games (Virtual
Console games seem to be carry-heavy for some reason; maybe a different
compiler?)