driver: Map hypervisor at fixed virtual address

First step to overcome relocation of the hypervisor and to stabilize its
configuration footprint after loading: We reserve a fixed virtual
address range from the kernel and simply map the hypervisor there. The
address is, of course, architecture specific, may even require
adjustments per target. But the advantages of having a stable
configuration in memory that can rather easily checked after setup and
the simplifications in the hypervisor code when it will always have the
same virtual address outweighs this.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
core: Fix output of hypervisor text start

Though we reduced the header size in dfe32d1ba6, the text segment is
still 16-byte aligned. Better introduce an explicit mark for the start
instead of relying on address calculations.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
core/driver: Switch hypervisor to fixed virtual address layout

Now that the driver always puts us at the same virtual address, we can
compile this into the hypervisor as well. On x86, we switch to the code
model "kernel", i.e. all virtual addresses have the higher 32 bits set.
This allows to drop -fpic and -fpie, the global offset table. And the
entry field in the header is now absolute.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
TODO: Update

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
driver: Rename source file

It's a single module, and it will likely stay such, so give it a more
specific name.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
core: Add functions to read/write field values of 32/64-bit registers

The following aims are obtained using these functions: making a register
description to be uniform, easy reading/writing field values without using bit
operations, making the code more readable, preventing casual changes of
register content.

Signed-off-by: Ivan Kolchin <ivan.kolchin@siemens.com>
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
x86: Fix a bug with writing zeros to register IOTLB_REG containing RsvdP field

Register IOTLB_REG contains RsvdP fields. Their values must be preserved on writing
in accordance with the specification. Operations having accessed to this kind of
registers in unsafe way were replaced by means of new helpers.

Signed-off-by: Ivan Kolchin <ivan.kolchin@siemens.com>
[Jan: style fix of VTD_IOTLB_R_MASK]
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
x86: Drop no longer used includes

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
x86: Make use of mmio_read32/64_field

Minor cleanup: Use the new mmio field accessor to obtain values from the
xAPIC and the DMAR units.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
core: Reduce dependencies of jailhouse/entry.h

Will help to include jailhouse/paging.h from files where this created
circular dependencies so far.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
core: Introduce paging_structures abstraction

This structure shall once hold a reference to both the paging hierarchy
and how it is read or manipulated. So far, we once encapsulate the root
table reference and update all sites that deal with page tables.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
core: Switch to table-driven page table construction and interpretation

Switch page table creation and interpretation to a new, fully
table-driven scheme. It is much more regular and also more flexible when
it comes to support more paging modes, specifically on x86 (32-bit
paging, PAE etc.) in order to extend MMIO support. It is also laying the
foundation creating hugepages, which will reduce TLB pressure and memory
usage. So far only reading of hugepages is supported.

A paging mode is now define via an array of paging structure. An array
entry represents a page table level, starting with the root level. Each
paging structure contains a number of handlers to set or get entries at
the corresponding level. It also contains a page size value which is
non-zero in case the page table level support terminal entries that
point to a physical page address. This implies that the final element in
the paging structure array must have a non-zero page size field.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
core: Drop unused parameters from page_map_virt2phys/create/destroy

The number of paging levels as well as flags for non-terminal table
entries are now encoded via the paging structures and their callbacks.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
x86: Check VMX features earlier

Factor out vmx_check_features and call it already during vmx_init. This
is required soon when we will access VMX MSR during common init.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
core: Add support for creating page tables with hugepages

When adding support for generating hugepages during page_map_create, we
also need to address the issue of overwriting or splitting up such
pages. When partially unmapping a hugepage, we need to break it up
first, then unmap the included pages. This break-up may fail when we are
short on memory, thus page_map_destroy may actually fail now, and we
have to take this into account on the caller side.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
x86: Enable hugepages in all hypervisor, EPT and VT-d page tables

Arm support for hugepage creation by adding the required sizes and
callbacks to the 64-bit paging mode. When deriving the paging modes of
EPT and VT-d, we now need to take their capabilities into account and
have to clear page_size at those levels that are not supported by the
underlying hardware.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
TODO: Update

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>