Add an ident line.
Add a new cache maintenance function, idcache_inv_all, to the table, and
implementations for each of the chips we support.  Most chips up through
armv6 can use the armv4 implementation which has a single coprocessor
opcode for this operation.  The rather more complex armv7 implementation
comes from netbsd.
Reserve a bit for statistics debugging.  I'll hopefully use it soon.
Track and expose the latest statistics from the firmware.

Tested:

* Intel Centrino 6205
Add a very basic and totally hacked up iwnstats program.

This just extracts the current statistics out from the NIC via
the new ioctl API and displays them.  It runs every 100ms to hopefully
grab the latest statistics.

I may eventually teach this to use libstatfoo like what has been done
for athstats and such; but this is good enough for now for people to
do some basic investigation.

Tested:

* Intel Centrino 6205
Add a new option - 'a <file>' - which spits out annotated callgraphs.

'-m <file>' spits out the given stream into <file> (eg, /dev/stdout).
However, it only resolves the first symbol; it doesn't parse the entire
callgraph.  If it fails to lookup then it doesn't print anything.

'-a' instead does a symbol and file:line lookup for each address in each
callgraph and will happily print the address itself with no lookup
information if it couldn't look things up.

This makes it much easier to pull out individual records from a
pmc data file and look at the callgraph information without having to
hand-decode the addresses.

Sponsored by:	Netflix, Inc.
Add correct attributions.

Sponsored by:	Netflix, Inc.
Invalidate caches immediately upon entry to init_secondary().  Also set
the Bufferable bit in the PDE entries of the secondary processor startup
pagetables.

The caches really need to be invalidated even earlier than this, but this
is a big step in the right direction.  The invalidate needs to happen
before the MMU is enabled, which means it has to be called from asm code
that's running with physical addressing.  Fixing that will be handled in
a future change.
Add the bits needed to run SMP on imx6.

The 'option SMP' isn't added to the kernel config yet; people wanting to
test this have to opt-in for now.
* Ensure enough ports/phys are available for both the AR8327 and previous
  switches.

* Add some new VLAN HAL methods that will be used by the VLAN configuration
  code.  The AR933x and later switches use slightly different register
  layouts (even though the driver currently doesn't support it.)
Methodize the arswitch VLAN routines.

These differ per chipset family in subtle and evil ways.

It becomes very noticable on the AR8327 where the layout is just plain
wrong.
Add initial AR8327 support.

This is (almost!) enough to actually probe, attach, configure a default
port group and do some basic work.  It's also totally hard-coded for
the Qualcomm Atheros DB120 board - it doesn't yet have any of the code
from OpenWRT which parses extra configuration data to know how to program
the switch.  The LED stuff is also missing.

But, it's enough to facilitate board, PHY, switch and VLAN bringup,
so I am committing it now.

Tested:

* Qualcomm Atheros DB120

Obtained from:	OpenWRT
Link the AR8327 to the build.
Add the AR8327 bits to the DB120 config file.

There's plenty of hints that I haven't yet fleshed out and are hardcoded
in arswitch_8327.c.  They're listed here (from OpenWRT) for completeness.

This is enough to get the thing up, running and pinging.

Note that the mdiobus for the on-switch switch changes - the AR8327
probes first, which exposes mdio1, and thus the arge1 mdiobus will probe
and attach as mdio2.  That is what the AR9344 on-chip switch has to
attach to.

Tested:

* Qualcomm Atheros DB120
Add in port0/port6 configuration as part of the platform data code path.

It's still hardcoded (for db120) but it is now hardcoded in all the
same place (ie, the pdata path.)  The port config/status code now checks
port0/port6 as appropriate to configure things.

Tested:

* Qualcomm Atheros DB120, AR8327 switch.
Update ATP driver:
- Add support for emulating a mouse wheel, Z-axis.

Submitted by:	Rohit Grover <rgrover1@gmail.com>
MFC after:	2 weeks
Enable the second and the third I2C controllers on Beaglebone-black.

The first I2C controller is only used to manage the on-board devices (PMIC
and HDMI framer) and its bus is not exposed on the expasion headers.

With this change the following pins on the P9 expansion headers are now
reserved as I2C pins:

 Pin 17 - I2C1 SCL
 Pin 18 - I2C1 SDA
 Pin 19 - I2C2 SCL
 Pin 20 - I2C2 SDA

The I2C2 is the bus that should be used to read the contents of cape
eeproms.

Approved by:	adrian (mentor, implicit)
Consistently pass around context information using a simple pointer.  This
fixes some dereferencing bugs in Chinese character set conversions.

PR:		185964
MFC after:	5 days
Fix Simplified Chinese character set conversions by switching around the
fields of an internal struct so it corresponds with the way variables of
this type are initialised.

PR:		185964
Submitted by:	Manuel Mausz <manuel-freebsd@mausz.at>
MFC after:	5 days
Fix an array index out of bounds bug in iconv VIQR (Vietnamese) module.

PR:		185964
Submitted by:	Manuel Mausz <manuel-freebsd@mausz.at>
MFC after:	5 days