HACK: drm/nouveau: prime: Pin buffer objects to VRAM

This is currently required to work around the lack of proper SMMU
support on Tegra. Ideally buffer objects could always be pinned to GART
and the SMMU will take care of mapping them to a linear I/O virtual
address range for importers.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Revert "ltc/gf100-: fix cbc issues on certain boards"

This reverts commit b15a810e97b8279cdbbfc90ede9e3fb51157f92b.

Causes IOMMU errors on GK20A.