rambi: Update the DPTF configuration

- Add passive thresholds for thermal participants
- Disable the charger participant and remove from _TRT

BUG=chrome-os-partner:17279
BRANCH=rambi
TEST=build and boot on rambi and start ESIF framework

Change-Id: Ie5917413aceadee6e39594257aaafb0bcb399d09
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/181663
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/5029
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
chrome ec: Update header and add functions to support DPTF

The EC now supports two auxiliary programmable trip points for
thermal monitoring.  These are expected to be used by DPTF and
need to be exported.

In order to support these the header was updated from the latest
chrome ec source.

BUG=chrome-os-partner:17279
BRANCH=rambi
TEST=build and boot on rambi

Change-Id: I257d910daac4e36280c0cecf4129381a32ffcb9a
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/181661
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/5027
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
baytrail: Updates for DPTF ACPI framework

- Remove some unused functions from CPU participant that were
confusing the userland component since the CPU does not have
an ACPI managed sensor.

- Guard the charger participant with an ifdef so it can be
left out if not supported.

- Use the EC methods for setting auxiliary trip points and for
handling the event when those trip points are crossed.

- Add _NTT _DTI _SCP methods for thermal sensors.  I'm not
clear if these are required or not but they seem to be expected
by the other DPTF framework components.

BUG=chrome-os-partner:17279
BRANCH=rambi
TEST=build and boot on rambi and load ESIF framework

Change-Id: I3c9d92d5c52e5a7ec890a377e65ebf118cdd7087
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/181662
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/5028
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
chrome ec: call DPTF thermal threshold event handler

When an EC thermal event occurs call the DPTF thermal threshold
event handler to handle notifications.

Change-Id: Ica928790bb478fccf8a46afef4eb7800589518b2
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/5726
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
chrome ec: Fix temperature calcualtion in PATx methods

The PATx methods will be passed a temperature in deci-kelvin,
so it needs to be converted back to kelvin before being sent
to the EC.

The PAT disable method is changed to take the temperature ID
as an argument so individual sensors can be disabled.

BUG=chrome-os-partner:17279
BRANCH=rambi
TEST=build and boot on rambi, load esif_lf kernel drivers and
esif_uf userspace application.  Start and stop DPTF and see
that temperature thresholds are set to sane values.

Change-Id: Ieeff5a5d2d833042923c059caf3e5abaf392da95
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/182023
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/5036
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
rambi: dptf: Set critical thresholds

Set critical temperature thresdholds to 70C.  This will cause DPTF
framework to shut down the system so it may need to be higher or
lower but will need some testing.

BUG=chrome-os-partner:17279
BRANCH=rambi
TEST=build and boot on rambi, start DPTF framework and observe it
using specified critical thresholds.

Change-Id: Ibbf6d814295eb5ff006cb879676b7613f5eb56a3
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/182025
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/5038
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
baytrail: dptf: Add disable trip point methods

Added a method in each temp sensor to disable the aux trip points
and then a wrapper function to call this method for each enabled
temperature sensor.

The event handler function is changed to not use a switch statement
so it does not need to be serialized.  This was causing issues
with nested locking between the global lock and the EC PATM mutex.

Some unused code in temp sensors that was added earlier is removed
and instead a critical threshold is specified in _CRT.

The top level DPTF device _OSC method is expanded to check for the
passive policy UUID and initialize thermal devices.  This is done
for both enable and disable steps to ensure that the EC thermal
thresholds are reset in both cases.

Additionally the priority based _TRT is specified with TRTR=1.

BUG=chrome-os-partner:17279
BRANCH=rambi
TEST=build and boot on rambi, load esif_lf kernel drivers and start
esif_uf application.  Observe that temperature thresholds are set
properly when running 'appstart Dptf' and that they are disabled
after running 'appstop Dptf'

Change-Id: Ia15824ca42164dadae2011d4e364b70905e36f85
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/182024
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/5037
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
chromeec: add function to reboot on unexpected image

It's helpful to have a generic function that will tell
the EC to reboot if the EC isn't running a specified
image. Add that and implement google_chromeec_early_init()
to utilize the new function still maintaing its semantics
of if recvoery mode is enabled the EC should be running its
RO image. There is a slight change in that no communication
is done with the EC if not in recovery mode.

BUG=chrome-os-partner:24133
BRANCH=rambi,squawks
TEST=Built and boot with recovery request. Noted EC reboot.

Change-Id: I22240f6a11231e39c33fd79796a52ec76b119397
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/182060
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: http://review.coreboot.org/5039
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
baytrail: reboot with EC in S0 with no MRC cache and EC in RW

This improves boot time in 2 ways for a firmware upgrade:

1. Normally MRC would detect the S0 state without an MRC cache
   even though it's told to the S5 path. When it observes this
   state a cold reset occurs. The cold reset stays in S5 for
   at least 4 seconds which is time observed by the end user.

2. As the EC was running RW code before the reset after firmware
   upgrade it will still be running the older RW code. Vboot will
   then reboot the EC and the whole system to put the EC into RO
   mode so it can handle the RW update.

The issues are mitigated by detecting the system is in S0 with
no MRC cache and the EC isn't in RO mode. Therefore we can do the
reboot without waiting the 4 secs and the EC is running RO so
the 2nd reboot is not necessary.

BUG=chrome-os-partner:24133
BRANCH=rambi,squawks
TEST=Booted. Updated firmware while in OS. Rebooted. Noted the
     EC reboot before MRC execution.

Change-Id: I1c53d334a5e18c237a74ffbe96f263a7540cd8fe
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/182061
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: http://review.coreboot.org/5040
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
baytrail: add C0 microcode update

Include C0 microcode drop.

BUG=None
BRANCH=rambi,squawks
TEST=Built. Booted B3 part.

Change-Id: If454658235cd5a7b8640de0b3fa12dccddb0e9f6
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/182080
Reviewed-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: http://review.coreboot.org/5041
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>