MC: Add AsmLexer::BigNum token for integers greater than 64 bits

This will be needed for .octa support, but we don't want to just use the
existing AsmLexer::Integer for it and then have to litter all its users
with explicit checks for the size, and make them use the new get APIntVal()
method.

So let the lexer produce an AsmLexer::Integer as before for numbers which
are small enough — which appears to cover what was previously a nasty
special case handling of numbers which don't fit in int64_t but *do* fit
in uint64_t.

Where the number is too large even for that, produce an AsmLexer::BigNum
instead. We do nothing with these except complain about them for now,
but that will be changed shortly...

Based on a patch from PaX Team <pageexec@freemail.hu>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200613 91177308-0d34-0410-b5e6-96231b3b80d8
MC: Add support for .octa

This is a minimal implementation which accepts only constants rather than
full expressions, but that should be perfectly sufficient for all known
users for now.

Patch from PaX Team <pageexec@freemail.hu>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200614 91177308-0d34-0410-b5e6-96231b3b80d8
MC: Fix .octa output for APInts with BitWidth > 128

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200615 91177308-0d34-0410-b5e6-96231b3b80d8
ARMTTI: We don't have 16 allocatable scalar registers

This caused an regression on libquantum after enabling the new loop vectorizer
unroll heuristics.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200616 91177308-0d34-0410-b5e6-96231b3b80d8
[Sparc] Set %o7 as the return address register instead of %i7 in MCRegisterInfo. Also, add CFI instructions to initialize the frame correctly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200617 91177308-0d34-0410-b5e6-96231b3b80d8
R600/SI: Fix insertelement with dynamic indices.

This didn't work for any integer vectors, and didn't
work with some sizes of float vectors. This should now
work with all sizes of float and i32 vectors.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200619 91177308-0d34-0410-b5e6-96231b3b80d8
Add some xfailed R600 tests for 64-bit private accesses.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200620 91177308-0d34-0410-b5e6-96231b3b80d8
LoopVectorizer: Enable unrolling of conditional stores and the load/store
unrolling heuristic per default

Benchmarking on x86_64 (thanks Chandler!) and ARM has shown those options speed
up some benchmarks while not causing any interesting regressions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200621 91177308-0d34-0410-b5e6-96231b3b80d8
Replace PPC instruction-size code with MCInstrDesc getSize

As part of the cleanup done to enable the disassembler, the PPC instructions
now have a valid Size description field. This can now be used to replace some
custom logic in a few places to compute instruction sizes.

Patch by David Wiberg!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200623 91177308-0d34-0410-b5e6-96231b3b80d8
Merge HasVEXPrefix/HasEVEXPrefix/HasXOPPrefix into a 2-bit 'encoding' field in TSFlags.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200624 91177308-0d34-0410-b5e6-96231b3b80d8
Simplify some code since VEX and EVEX instructions never have HasOpSizePrefix.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200625 91177308-0d34-0410-b5e6-96231b3b80d8
Merge x86 HasOpSizePrefix/HasOpSize16Prefix into a 2-bit OpSize field with 0 meaning no 0x66 prefix in any mode. Rename Opsize16->OpSize32 and OpSize->OpSize16. The classes now refer to their operand size rather than the mode in which they need a 0x66 prefix. Hopefully can merge REX_W into this as OpSize64.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200626 91177308-0d34-0410-b5e6-96231b3b80d8
TableGen/X86RecognizableInstr.h: Prune out-of-date "@param isSSE". [-Wdocumentation]

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200628 91177308-0d34-0410-b5e6-96231b3b80d8
[CMake] Untabify.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200644 91177308-0d34-0410-b5e6-96231b3b80d8
[CMake] Move cmake_minimum_required(2.8.8) at the top.

Suggested by Stephen Kelly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200645 91177308-0d34-0410-b5e6-96231b3b80d8
Unaligned access is supported on ARMv6 and ARMv7 for the NetBSD target.
Patch from Matt Thomas.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200654 91177308-0d34-0410-b5e6-96231b3b80d8
Lower llvm.expect intrinsic correctly for i1

LowerExpectIntrinsic previously only understood the idiom of an expect
intrinsic followed by a comparison with zero. For llvm.expect.i1, the
comparison would be stripped by the early-cse pass.

Patch by Daniel Micay.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200664 91177308-0d34-0410-b5e6-96231b3b80d8