First commit. Required functionality acheived with minor alterations to demo code. Attempting to implement basic filtering in top-level file.
Working through syntax errors in order to implement a sepia tint.
VHDL compiles again, still testing to see if the tint works properly.
Added edge conditions to my sepia tint, so that RGB numbers won't exceeed 255 or less than 0 when shifted.
Sepia tint works great.  Half way to B Functionality.
Working sepia, attempting to implement a negative filter.
Working on implementing a black and white filter.  Negative and sepia working properly.  Added a t_factor that will hopefully improve the quality of the sepia tint by scaling the values of rgb.
Working through multiple type and casting problems.  Primary problem is finding a way to multiply by a fraction correctly.
Attempting to solve same multiplication problem as well as address possible timing issue.
Continuing to change type casting in various ways.  ufixed is proving challenging to understand and work with properly.
Attempting to properly delay the DVI output signals in order to prevent timing errors with the combinational logic.
Went back and decided not to pipeline.  There are too many variables I don't understand for me to pipeline properly and I seem to be creating more problems, fixing the minor bugs I was seeing.
Apparently the glitching I have been seeing is due to my monitor native resolution.  I am still no closer to implementing a grayscale filter.
Continuing to mess with ufixed functions.  No closer to finishing filter.
Removed the ufixed types and instead made my unsigned numbers much larger and then did all of the multiplication without decimal places.  Then divivded by 1000 to bring everything down to the right size and then used a signal assignment to only save the lowest 8 bits.  This should remove a lot of signal sizing problems.
Removed grayscale and implemented 5 new settings.  All filters are based on some sort of color alteration and can be used with the first three switches.
Removed several new filters to attempt to isolate timing errors.
Fixed an incorrect signal assignment and reimplemented one of my A functionality filters.  Preparing to go for gold.
Still having a problem with timing when I implement the last level of functionality.  It almost seems that my combinational logic takes too long with one more line.
Fixed a logical error, now all filters except the very last one work properly.