thermal: trace: Trace temperature changes

Create a new event to trace the temperature of a thermal zone. Using
this event trace the temperature changes of the thermal zone every-time
it is updated.

Cc: Zhang Rui <rui.zhang@intel.com>
Cc: Eduardo Valentin <edubezval@gmail.com>
Cc: Steven Rostedt <rostedt@goodmis.org>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Ingo Molnar <mingo@redhat.com>
Signed-off-by: Punit Agrawal <punit.agrawal@arm.com>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
thermal: trace: Trace when a cooling device's state is updated

Introduce and use an event to trace when a cooling device's state is
updated. This is useful to follow the effect of governor decisions on
cooling devices.

Cc: Zhang Rui <rui.zhang@intel.com>
Cc: Eduardo Valentin <edubezval@gmail.com>
Cc: Steven Rostedt <rostedt@goodmis.org>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Ingo Molnar <mingo@redhat.com>
Signed-off-by: Punit Agrawal <punit.agrawal@arm.com>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
thermal: trace: Trace when temperature is above a trip point

Create a new event to trace when the temperature is above a trip
point. Use the trace-point when handling non-critical and critical
trip pionts.

Cc: Zhang Rui <rui.zhang@intel.com>
Cc: Eduardo Valentin <edubezval@gmail.com>
Cc: Steven Rostedt <rostedt@goodmis.org>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Ingo Molnar <mingo@redhat.com>
Signed-off-by: Punit Agrawal <punit.agrawal@arm.com>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
thermal: add support to disable thermal zone from DTS

Add support to check status of the thermal zone before registering the
zone. This will help on disabling some non-existing thermal zone from
the top level DTS file out of common dtsi thermalzone file.

For example,
we have 3 platforms almost same but thermal zones on this platform are
little bit different. Platform 1 and 2 have three thermal zones and
platform 3 has two thermal zones. To avoid duplication of the thermal
zones entries on each DTS file of platforms,we created one common
dtsi file for thermal zone and included this dtsi file from these
3 platform's top level dts file.

On common thermal zone com dtsi file, all thermal zone are enabled and
need to disable one of thermal zone on platform 3 dts file. For this, we
just added entry status = "disabled" for that thermal zone on platform 3
dts file and along with this change to make it work.

This way, we reuse the common file and control the enable/disable of the
thermal zone from top level dts file.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
Thermal: imx: add i.mx6sx thermal support

i.MX6SX has some new features of thermal interrupt function,
there are LOW, HIGH and PANIC irq for thermal sensor, so add
platform data to separate different thermal version;

The reset value of LOW ALARM is 0 which means the highest
temp, so the LOW ALARM will be triggered once irq is enabled,
so we need to correct it before enabling thermal irq;

Enable PANIC ALARM as critical trip point, it will trigger
system reset via SRC module once PANIC IRQ is triggered, it
is pure hardware function, so use it instead of software
reset by cooling device.

Signed-off-by: Anson Huang <b20788@freescale.com>
Tested-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
pwm: fsl-ftm: Clean up the code

This patch intends to prepare for converting to direct regmap API usage.

Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
pwm: fsl-ftm: Convert to direct regmap API usage

The regmap core supports different endian modes for devices. This patch
convert to direct regmap API usage, preparing to support big endianness
for LS1 SoC.

Using the regmap framework it will be easy to support devices that only
differ in endianness with the same device driver.

Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
pwm: fsl-ftm: Document 'big-endian' property

The same FTM PWM device can have a different endianness on different
SoCs. The device tree provides a property to describing this so that an
operating system device driver can handle all variants of the device.
Refer to the table below for the endianness of the FTM PWM block as
integrated into the existing SoCs:

	SoC     | FTM-PWM endianness
	--------+-------------------
	Vybrid  | LE
	LS1     | BE
	LS2     | LE

Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
pwm: fsl-ftm: Select REGMAP_MMIO

Commit 42fa98a9c360 ("pwm: fsl-ftm: Convert to direct regmap API usage")
introduced the following error when REGMAP_MMIO=n:

drivers/built-in.o: In function `fsl_pwm_probe':
>> pwm-fsl-ftm.c:(.text+0xd7d7): undefined reference to `devm_regmap_init_mmio_clk'

Select select REGMAP_MMIO in order to fix this error.

Reported-by: kbuild test robot <fengguang.wu@intel.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
pwm: lpss: Add ACPI and PCI IDs for Intel Braswell

This is pretty much the same as Baytrail PWM. Only difference is that the
input clock runs on different frequency.

Signed-off-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
pwm: lpss: Properly split driver to parts

The driver consists of core, PCI, and platform parts. It would be better
to split them into separate files.

The platform driver is now called pwm-lpss-platform. Thus, previously
set CONFIG_PWM_LPSS=m is not enough to build it. But we are on the safe
side since it seems no one from outside Intel is using it for now.

While here, move to use macros module_pci_driver() and
module_platform_driver().

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Acked-by: Alan Cox <alan@linux.intel.com>
[thierry.reding: change select to depends on PWM_LPSS, cleanup]
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
pwm: lpss: pci: Move to use pcim_enable_device()

Let's use managed functions for this driver.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
pwm: lpss: Fix build failure on PowerPC

An x86 build seems to pull in the linux/io.h include indirectly. On
PowerPC that doesn't happen and the build breaks due to the readl() and
writel() functions not being declared. Fix this by explicitly including
linux/io.h.

Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
pwm: lpss: use c99 initializers in structures

Use c99 initializers for structures.

A simplified version of the semantic match that finds this problem is as
follows: (http://coccinelle.lip6.fr/)

// <smpl>
@decl@
identifier i1,fld;
type T;
field list[n] fs;
@@

struct i1 {
 fs
 T fld;
 ...};

@bad@
identifier decl.i1,i2;
expression e;
initializer list[decl.n] is;
@@

struct i1 i2 = { is,
+ .fld = e
- e
 ,...};
// </smpl>

Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr>
[thierry.reding: rebased and applied same fix for Braswell]
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
pwm: lpss: make it buildable only on X86

There is no sign of this IP block on non-x86 architectures and rather will not
be. Thus, make this explicit by applying a direct dependency to X86.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
pwm: Fix possible ZERO_SIZE_PTR pointer dereferencing error.

Since we cannot make sure the 'chip->npwm' will always be none zero here,
and then if either equal to zero, the kzalloc() will return ZERO_SIZE_PTR,
which equals to ((void *)16).

So this patch fix this with just doing the zero check before calling kzalloc().

Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
pwm: imx: Fix the macro MX3_PWMCR_PRESCALER(x) definition

This patch adds missing parentheses around the argument of the macro
MX3_PWMCR_PRESCALER(x) to avoid any potential macro expansion issue.

Reported-by: Lothar Waßmann <LW@KARO-electronics.de>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Shawn Guo <shawn.guo@freescale.com>
Cc: Lothar Waßmann <LW@KARO-electronics.de>
Cc: linux-pwm@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
Acked-by: Shawn Guo <shawn.guo@freescale.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
pwm: imx: Cleanup indentation for register definitions

This patch contains no logic change to cleanup indentation for register
definitions only.

Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Shawn Guo <shawn.guo@freescale.com>
Cc: Lothar Waßmann <LW@KARO-electronics.de>
Cc: linux-pwm@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
Acked-by: Shawn Guo <shawn.guo@freescale.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
pwm: imx: Avoid sample FIFO overflow for i.MX PWM version2

The i.MX PWM version2 is embedded in several i.MX SoCs, such as i.MX27,
i.MX51 and i.MX6SL.  There is a 4-word (16 bit) sample FIFO in this IP.
Each FIFO slot determines the duty period of a PWM waveform in one full
cycle.  The IP spec mentions that we should not write a fourth sample
because the FIFO will become full and triggers a FIFO write error (FWE)
which will prevent the PWM from starting once it is enabled.  In order
to avoid any sample FIFO overflow issue, this patch clears all sample
FIFO by doing software reset in the configuration hook when the
controller is disabled or waits for a full PWM cycle to get a
relinquished FIFO slot when the controller is enabled and the FIFO is
fully loaded.

The FIFO overflow issue can be reproduced by the following commands on
the i.MX6SL EVK platform, assuming we use PWM2 for the debug LED which
is driven by the pin HSIC_STROBE and the maximal brightness is 255.

	echo 0   > /sys/class/leds/user/brightness
	echo 0   > /sys/class/leds/user/brightness
	echo 0   > /sys/class/leds/user/brightness
	echo 0   > /sys/class/leds/user/brightness
	echo 255 > /sys/class/leds/user/brightness

Here, FWE happens (PWMSR register reads 0x58) and the LED can not be
lighten.

Another way to reproduce the FIFO overflow issue is to run this script:

	while true;
		do echo 255 > /sys/class/leds/user/brightness;
	done

Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Shawn Guo <shawn.guo@freescale.com>
Cc: Lothar Waßmann <LW@KARO-electronics.de>
Cc: linux-pwm@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
Acked-by: Shawn Guo <shawn.guo@freescale.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
pwm: rockchip: Allow polarity invert on rk3288

The rk3288 has the ability to invert the polarity of the PWM.  Let's
enable that ability.  Note that this increases pwm_cells to 3 for
rk3288.

Signed-off-by: Doug Anderson <dianders@chromium.org>
Reviewed-by: Caesar Wang <caesar.wang@rock-chips.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>