acpuclock-7627.c: fixing table selection in select_freq_plan()

In the function 'select_freq_plan()' there's a check to select
the correct table for 1008Mhz CPU's, because there's a conflict
between 7627AA and 8625 chips.

However this check is wrong:
	if (pll_mhz[ACPU_PLL_2] == 245)

It should be:
	if (pll_mhz[ACPU_PLL_1] == 245)

We don't want to check PLL_2 but PLL_1 being '245' or not.

Due of this bug the wrong frequency table is getting selected
for 1GHz 8625 chips with PLL_2=245.

Previously-detected-by: Peter Jung <peter.jung@lge.com>
Signed-off-by: moddingg33k <moddingg33k@t-online.de>
block: *fixing CAF merge derp*

CAF did apply following patches:

2012-02-08: "block: separate out blk_rq_merge_ok() and blk_try_merge() from elevator functions" (https://www.codeaurora.org/cgit/quic/la/kernel/msm/commit/block/elevator.c?h=msm-3.4&id=050c8ea80e3e90019d9e981c6a117ef614e882ed)

After that they applied:

2012-05-24: "block: ioctl support for sanitize in eMMC 4.5" (https://www.codeaurora.org/cgit/quic/la/kernel/msm/commit/block/elevator.c?h=msm-3.4&id=73937f5face75e05ec2a72966d04f4e20aa18379)
(this commit if faulty already after the commit from 2012-02-08!)

And then they merged:

2012-06-07: "Merge commit 'AU_LINUX_ANDROID_ICS.04.00.04.00.126' into msm-3.4" (https://www.codeaurora.org/cgit/quic/la/kernel/msm/commit/block/elevator.c?h=msm-3.4&id=f132c6cf77251e011e1dad0ec88c0b1fda16d5aa)
(this totally screwed the patch from 2012-02-08)

Now it's fixed and like it's supposed like :-)

Signed-off-by: moddingg33k <moddingg33k@t-online.de>
drivers/cpufreq: conservative: simplify SAMPLING_TIME determination for ARM

...because simple things can be good things, too.

This commit introduces MIN_SAMPLING_RATE & DEF_SAMPLING_RATE
which are used to directly set the driver's minimum and default
sampling rate rather than doing any calculation before.

Signed-off-by: moddingg33k <moddingg33k@t-online.de>
mmc: msm_sdcc: check for pending_resume in SDCC system suspend

If system comes out of suspend, msmsdcc_pm_resume() sets the
host->pending_resume flag if the SDCC wasn't runtime suspended.
Now if the system again goes to suspend without any SDCC activity
then host->pending_resume flag will remain set which may cause the SDCC
resume to happen first and then suspend.

To avoid this unnecessary resume/suspend, make sure that pending_resume
flag is cleared before calling the msmsdcc_runtime_suspend().

CRs-Fixed: 438081
Change-Id: I2b667bec704f938a532d4780dd9b7937e2eb12c7
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
binfmt_elf.c: use get_random_int() to fix entropy depleting.

Usually the entropy pool depletes very fast and stays in the 100-200 range.
After this patch, the entropy stays in the 600-1000 range without the risk of
depleting in normal workloads.

Change-Id: Ice0d0f14691046249d7b4a4d31af98ab80c6306b
huawei_battery.c: reduced charging voltage from 4350 mV to 4300 mV

...to prevent overcharging and increasing battery's longevity.

Signed-off-by: moddingg33k <moddingg33k@t-online.de>
huawei_battery.c: increase RPC polling from 5sec to 60sec

Signed-off-by: moddingg33k <moddingg33k@t-online.de>
huawei_battery.c: decrease BATTERY_HIGH_HIGH & HEALTH_HIGH_VOLT_MAX to 4350

Signed-off-by: moddingg33k <moddingg33k@t-online.de>
msm: rq_stats: move away from tick-sched

IMHO tick-sched is the wrong place for this piece of code. The only thing
which needs to be done in there is to call (void update_rq_stats()).

Let's move update_rq_stats() and wakeup_user() into arch/arm/mach-msm/msm_rq_stats.c

Since wakeup_user() is called unconditionally and doesn't seem to be needed
elsewhere, get rid of this function and migrate it to update_rq_stats().

To avoid possible conflicts and to make clear where 'update_rq_stats' belongs
to we rename it into 'msm_update_rq_stats'.

On this opportunity we also define msm-rq-stats internal declarations as static.

And for the case we disable those rq-stats one day (we will for sure!) add
some ifdef's within tick-sched.c

Signed-off-by: moddingg33k <moddingg33k@t-online.de>
mutex: Place lock in contended state after fastpath_lock failure

ARM recently moved to asm-generic/mutex-xchg.h for its mutex
implementation after the previous implementation was found to be missing
some crucial memory barriers. However, this has revealed some problems
running hackbench on SMP platforms due to the way in which the
MUTEX_SPIN_ON_OWNER code operates.

The symptoms are that a bunch of hackbench tasks are left waiting on an
unlocked mutex and therefore never get woken up to claim it. This boils
down to the following sequence of events:

        Task A        Task B        Task C        Lock value
0                                                     1
1       lock()                                        0
2                     lock()                          0
3                     spin(A)                         0
4       unlock()                                      1
5                                   lock()            0
6                     cmpxchg(1,0)                    0
7                     contended()                    -1
8       lock()                                        0
9       spin(C)                                       0
10                                  unlock()          1
11      cmpxchg(1,0)                                  0
12      unlock()                                      1

At this point, the lock is unlocked, but Task B is in an uninterruptible
sleep with nobody to wake it up.

This patch fixes the problem by ensuring we put the lock into the
contended state if we fail to acquire it on the fastpath, ensuring that
any blocked waiters are woken up when the mutex is released.

Signed-off-by: Will Deacon <will.deacon@arm.com>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Chris Mason <chris.mason@fusionio.com>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: <stable@vger.kernel.org>
Reviewed-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Link: http://lkml.kernel.org/n/tip-6e9lrw2avczr0617fzl5vqb8@git.kernel.org
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
ARM: 7668/1: fix memset-related crashes caused by recent GCC (4.7.2) optimizations

Recent GCC versions (e.g. GCC-4.7.2) perform optimizations based on
assumptions about the implementation of memset and similar functions.
The current ARM optimized memset code does not return the value of
its first argument, as is usually expected from standard implementations.

For instance in the following function:

void debug_mutex_lock_common(struct mutex *lock, struct mutex_waiter *waiter)
{
	memset(waiter, MUTEX_DEBUG_INIT, sizeof(*waiter));
	waiter->magic = waiter;
	INIT_LIST_HEAD(&waiter->list);
}

compiled as:

800554d0 <debug_mutex_lock_common>:
800554d0:       e92d4008        push    {r3, lr}
800554d4:       e1a00001        mov     r0, r1
800554d8:       e3a02010        mov     r2, #16 ; 0x10
800554dc:       e3a01011        mov     r1, #17 ; 0x11
800554e0:       eb04426e        bl      80165ea0 <memset>
800554e4:       e1a03000        mov     r3, r0
800554e8:       e583000c        str     r0, [r3, #12]
800554ec:       e5830000        str     r0, [r3]
800554f0:       e5830004        str     r0, [r3, #4]
800554f4:       e8bd8008        pop     {r3, pc}

GCC assumes memset returns the value of pointer 'waiter' in register r0; causing
register/memory corruptions.

This patch fixes the return value of the assembly version of memset.
It adds a 'mov' instruction and merges an additional load+store into
existing load/store instructions.
For ease of review, here is a breakdown of the patch into 4 simple steps:

Step 1
======
Perform the following substitutions:
ip -> r8, then
r0 -> ip,
and insert 'mov ip, r0' as the first statement of the function.
At this point, we have a memset() implementation returning the proper result,
but corrupting r8 on some paths (the ones that were using ip).

Step 2
======
Make sure r8 is saved and restored when (! CALGN(1)+0) == 1:

save r8:
-       str     lr, [sp, #-4]!
+       stmfd   sp!, {r8, lr}

and restore r8 on both exit paths:
-       ldmeqfd sp!, {pc}               @ Now <64 bytes to go.
+       ldmeqfd sp!, {r8, pc}           @ Now <64 bytes to go.
(...)
        tst     r2, #16
        stmneia ip!, {r1, r3, r8, lr}
-       ldr     lr, [sp], #4
+       ldmfd   sp!, {r8, lr}

Step 3
======
Make sure r8 is saved and restored when (! CALGN(1)+0) == 0:

save r8:
-       stmfd   sp!, {r4-r7, lr}
+       stmfd   sp!, {r4-r8, lr}

and restore r8 on both exit paths:
        bgt     3b
-       ldmeqfd sp!, {r4-r7, pc}
+       ldmeqfd sp!, {r4-r8, pc}
(...)
        tst     r2, #16
        stmneia ip!, {r4-r7}
-       ldmfd   sp!, {r4-r7, lr}
+       ldmfd   sp!, {r4-r8, lr}

Step 4
======
Rewrite register list "r4-r7, r8" as "r4-r8".

Signed-off-by: Ivan Djelic <ivan.djelic@parrot.com>
Reviewed-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Dirk Behme <dirk.behme@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
ARM: 7670/1: fix the memset fix

Commit 455bd4c430b0 ("ARM: 7668/1: fix memset-related crashes caused by
recent GCC (4.7.2) optimizations") attempted to fix a compliance issue
with the memset return value.  However the memset itself became broken
by that patch for misaligned pointers.

This fixes the above by branching over the entry code from the
misaligned fixup code to avoid reloading the original pointer.

Also, because the function entry alignment is wrong in the Thumb mode
compilation, that fixup code is moved to the end.

While at it, the entry instructions are slightly reworked to help dual
issue pipelines.

Signed-off-by: Nicolas Pitre <nico@linaro.org>
Tested-by: Alexander Holler <holler@ahsoftware.de>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
ARM: 7822/1: add workaround for ambiguous C99 stdint.h types

The C99 types uintXX_t that are usually defined in 'stdint.h' are not as
unambiguous on ARM as you would expect. For the types below, there is a
difference on ARM between GCC built for bare metal ARM, GCC built for glibc
and the kernel itself, which results in build errors if you try to build with
-ffreestanding and include 'stdint.h' (such as when you include 'arm_neon.h'
in order to use NEON intrinsics)

As the typedefs for these types in 'stdint.h' are based on builtin defines
supplied by GCC, we can tweak these to align with the kernel's idea of those
types, so 'linux/types.h' and 'stdint.h' can be safely included from the same
source file (provided that -ffreestanding is used).

                   int32_t         uint32_t               uintptr_t
bare metal GCC     long            unsigned long          unsigned int
glibc GCC          int             unsigned int           unsigned int
kernel             int             unsigned int           unsigned long

Acked by: Dave Martin <dave.martin@arm.com>

Acked-by: Nicolas Pitre <nico@linaro.org>
Acked-by: Mikael Pettersson <mikpe@it.uu.se>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
ARM: add SCHED_HRTICK config option & fix HRTICK

ARM: add SCHED_HRTICK config option
	As we don't include kernel/Kconfig.hz as this defines HZ values
	unsuitable for ARM platforms, add the SCHED_HRTICK to properly configure
	the scheduler for hrtimer operation.

	Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

sched: Fix HRTICK
	David reported that the HRTICK sched feature was borken; which was enough
	motivation for me to finally fix it ;-)

	We should not allow hrtimer code to do softirq wakeups while holding scheduler
	locks. The hrtimer code only needs this when we accidentally try to program an
	expired time. We don't much care about those anyway since we have the regular
	tick to fall back to.

	Reported-by: David Ahern <dsahern@gmail.com>
	Tested-by: David Ahern <dsahern@gmail.com>
	Signed-off-by: Peter Zijlstra <peterz@infradead.org>
	Link: http://lkml.kernel.org/r/20130628091853.GE29209@dyad.programming.kicks-ass.net
	Signed-off-by: Ingo Molnar <mingo@kernel.org>