arc: Always halt core before doing software reset

Event-based software reset should be transactional, thus we have to halt
target before reset. We cannot resume it though, because this proc doesn't
know if user requested "reset halt" or "reset run". As a result software
reset is always "reset halt".

Signed-off-by: Anton Kolesov <Anton.Kolesov@synopsys.com>
arc: Do not halt target when examining

Target examination was halting the target. That is not expected by the
OpenOCD, target should be left in the same state as before examination. JTAG
works fine with unhalted targets, though of course there is a chance that
target state will change behind the scenes with unhalted target.

It seems that we also shouln't exit quickly from target_halt() in this case,
because target might be reset, but not halted.

Signed-off-by: Anton Kolesov <Anton.Kolesov@synopsys.com>
arc: Do not halt targets in board files

That is not required, since "reset halt" will halt them anyway.

Signed-off-by: Anton Kolesov <Anton.Kolesov@synopsys.com>
arc: Remove debug prints from arc_ocd_examine

Signed-off-by: Anton Kolesov <Anton.Kolesov@synopsys.com>
arc: Set proper debug reason when examining the target

When first examining the target it can be already halted (for example ARC
core scan be configured to halt on reset). Treat this situation gracefully
in OpenOCD, otherwise there is an error message that debug reason is
unknown.

Signed-off-by: Anton Kolesov <Anton.Kolesov@synopsys.com>